M25PE80
Instructions
Table 6.
Instruction set
Description
One-byte instruction Address Dummy
Data
Instruction
code
bytes
bytes
bytes
WREN
WRDI
Write enable
0000 0110
06h
04h
9Fh
05h
E5h
01h
E8h
03h
0
0
0
0
3
0
3
3
0
0
0
0
0
0
0
0
0
Write disable
0000 0100
1001 1111
0000 0101
1110 0101
0000 0001
1110 1000
0000 0011
0
1 to 3
1 to ∞
1
RDID
Read identification
Read status register
Write to lock register
Write status register
Read lock register
Read data bytes
RDSR
WRLR
WRSR(1)
RDLR
READ
1
1
1 to ∞
Read data bytes at higher
speed
FAST_READ
0000 1011
0Bh
3
1
1 to ∞
PW
PP
Page write
0000 1010
0000 0010
1101 1011
0010 0000
1101 1000
1100 0111
1011 1001
0Ah
02h
DBh
20h
D8h
C7h
B9h
3
3
3
3
3
0
0
0
0
0
0
0
0
0
1 to 256
Page program
Page erase
1 to 256
PE
0
0
0
0
0
SSE(1)
Subsector erase
Sector erase
Bulk erase
SE
BE
DP
Deep power-down
Release from deep
power-down
RDP
1010 1011
ABh
0
0
0
1. Instruction available only in the T9HX process (see Important note on page 6).
6.1
Write enable (WREN)
The write enable (WREN) instruction (Figure 7) sets the write enable latch (WEL) bit.
The write enable latch (WEL) bit must be set prior to every page write (PW), page program
(PP), page erase (PE), sector erase (SE), bulk erase (BE) and write to lock register (WRLR)
instructions.
The write enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
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NUMONYX [ NUMONYX B.V ]
