Instructions
M25PE80
6.14
Sector erase (SE)
The sector erase (SE) instruction sets to ‘1’ (FFh) all bits inside the chosen sector. Before it
can be accepted, a Write Enable (WREN) instruction must previously have been executed.
After the write enable (WREN) instruction has been decoded, the device sets the write
enable latch (WEL).
The sector erase (SE) instruction is entered by driving Chip Select (S) Low, followed by the
instruction code, and three address bytes on serial data input (D). Any address inside the
sector (see Table 5) is a valid address for the sector erase (SE) instruction. Chip Select (S)
must be driven Low for the entire duration of the sequence.
The instruction sequence is shown in Figure 20.
Chip Select (S) must be driven High after the eighth bit of the last address byte has been
latched in, otherwise the sector erase (SE) instruction is not executed. As soon as Chip
Select (S) is driven High, the self-timed sector erase cycle (whose duration is t ) is
SE
initiated. While the sector erase cycle is in progress, the status register may be read to
check the value of the write in progress (WIP) bit. The write in progress (WIP) bit is 1 during
the self-timed sector erase cycle, and is 0 when it is completed. At some unspecified time
before the cycle is complete, the write enable latch (WEL) bit is reset.
A sector erase (SE) instruction applied to a sector that contains a page that is hardware or
software protected is not executed.
Any sector erase (SE) instruction, while an erase, program or write cycle is in progress, is
rejected without having any effects on the cycle that is in progress.
If Reset (Reset) is driven Low while a sector erase (SE) cycle is in progress, the sector
erase cycle is interrupted and data may not be erased (see Table 15: Device status after a
Reset Low pulse). On Reset going Low, the device enters the reset mode and a time of
t
is then required before the device can be re-selected by driving Chip Select (S) Low.
RHSL
For the value of t
see Table 26: Timings after a Reset Low pulse in Section 11: DC and
RHSL
AC parameters.
Figure 20. Sector erase (SE) instruction sequence
S
0
1
2
3
4
5
6
7
8
9
29 30 31
C
D
Instruction
24-bit address
23 22
MSB
2
0
1
AI03751D
1. Address bits A23 to A20 are don’t care.
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NUMONYX [ NUMONYX B.V ]
