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M25PE40-VMW6TG 参数 Datasheet PDF下载

M25PE40-VMW6TG图片预览
型号: M25PE40-VMW6TG
PDF下载: 下载PDF文件 查看货源
内容描述: 4兆位,页擦除串行闪存与字节变性, 75兆赫的SPI总线,标准引脚 [4 Mbit, page-erasable serial Flash memory with byte alterability, 75 MHz SPI bus, standard pinout]
分类和应用: 闪存存储内存集成电路光电二极管时钟
文件页数/大小: 62 页 / 1298 K
品牌: NUMONYX [ NUMONYX B.V ]
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M25PE40  
Description  
Figure 1.  
Logic diagram - previous T7X Figure 2.  
process  
Logic diagram - new T9HX  
process  
V
V
CC  
CC  
D
Q
D
C
S
Q
C
S
M25PE40  
M25PE40  
W
TSL  
Reset  
Reset  
V
V
AI09704C  
SS  
AI13781  
SS  
Table 1.  
Signal names  
Signal name  
Function  
Direction  
C
Serial Clock  
Input  
D
Serial Data input  
Serial Data output  
Chip Select  
Input  
Output  
Input  
Input  
Input  
Q
S
TSL or W(1)  
Reset  
VCC  
Top Sector Lock or Write Protect  
Reset  
Supply voltage  
Ground  
VSS  
1. In the previous T7X process the pin is a Top Sector Lock input whereas in the new T9HX process, the pin  
is a Write Protect input (see Figure 1 and Figure 2).  
Figure 3.  
VFQFPN and SO connections  
M25PE40  
S
Q
1
2
3
4
8
7
6
5
V
CC  
Reset  
TSL or W  
C
D
V
SS  
AI09703d  
1. There is an exposed central pad on the underside of the VFQFPN package. This is pulled, internally, to  
VSS, and must not be allowed to be connected to any other voltage or signal line on the PCB.  
2. See Section 12: Package mechanical for package dimensions, and how to identify pin-1.  
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