DC and AC parameters
M25PE40
Table 23. Reset conditions
Test conditions specified in Table 14 and Table 15
Symbol
Alt.
Parameter
Conditions
Min. Typ. Max. Unit
(1)
tRLRH
tRST Reset pulse width
10
10
µs
ns
Chip should have been
deselected before Reset is
de-asserted
Chip Select High to
Reset High
tSHRH
1. Value guaranteed by characterization, not 100% tested in production.
(1)(2)
Table 24. Timings after a Reset Low pulse
Test conditions specified in Table 14 and Table 15
Symbol Alt.
Parameter
Conditions: Reset pulse occurred
Max.
Unit
While decoding an instruction(3): WREN,
WRDI, RDID, RDSR, READ, RDLR,
Fast_Read, WRLR, PW, PP, PE, SE, BE,
SSE, DP, RDP
30
µs
Under completion of an Erase or Program
cycle of a PW, PP, PE, SE, BE operation
300
3
µs
ms
ms
µs
Reset
tRHSL
tREC
recovery time Under completion of an Erase cycle of an
SSE operation
tW (see
Table 21)
Under completion of a WRSR operation
Device deselected (S High) and in Standby
mode
0
1. All the values are guaranteed by characterization, and not 100% tested in production.
2. See Table 12 for a description of the device status after a Reset Low pulse.
3. S remains Low while Reset is Low.
Figure 29. Reset AC waveforms
S
tSHRH
tRHSL
tRLRH
Reset
AI06808
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