M25PE16
Revision history
14
Revision history
Table 25. Document revision history
Date
Revision
Changes
16-Feb-2006
0.1
Initial release.
Figure 3: Bus master and memory devices on the SPI bus updated
and Note 2 added.
Section 4.8.1: Protocol-related protections clarified.
Address range for subsector 15 of sector 0 modified in Table 4:
Memory organization.
RESET signal behavior clarified in Section 6.5: Write status register
(WRSR), Section 6.9: Page write (PW), Section 6.10: Page program
(PP), Section 6.12: Page erase (PE), Section 6.14: Subsector erase
(SSE), Section 6.15: Bulk erase (BE).
07-Aug-2006
1
Section 8: Reset added to describe the device status after a RESET
Low pulse. Table Reset while a Read, Program or Erase cycle is in
progres replaced by Table 21: Timings after a Reset Low pulse
Table 19 split into two tables (see also Table 20). tBE typical value
updated. Small text changes.
HPM2 specified in HPM1 and HPM2 paragraph. Small text changes.
Table 12: Device status after a Reset Low pulse modified.
VIO max. modified in Table 13: Absolute maximum ratings.
13-Oct-2006
20-Nov-2006
2
3
fR, tW, tPW, tPP and tSSE modified in Table 18: AC characteristics
(50 MHz operation).
TSL/W signal renamed as W, Top Sector Lock functionality removed,
HPM2 removed.
Paragraph added in Section 3: SPI modes. TLEAD added to Table 13:
Absolute maximum ratings. tTHSL and tSHTL timings removed from
Table 18: AC characteristics (50 MHz operation) and Figure 26:
Write protect setup and hold timing. SO8W package specifications
updated (see Table 23 and Figure 30).
Document status promoted from preliminary data to datasheet. VCC
supply voltage and VSS ground added. Figure 3: Bus master and
memory devices on the SPI bus updated, Note 2 removed and
replaced by an explanatory paragraph.
12-Apr-2007
4
Behavior of WIP bit and lock registers specified at power-up in
Section 7: Power-up and power-down.
VFQFPN8 package specifications updated (see Figure 29 and
Table 22).
Removed ‘low voltage’ from the title.
Updated the value for the maximum clock frequency (from 50 to
75 MHz) through the document.
25-Mar-2008
01-Apr-2008
5
6
Added: Table 19: AC characteristics (75 MHz operation) and
ECOPACK® text in Section 12: Package mechanical.
Modified: Section 3: SPI modes and Table 17: DC characteristics.
Minor text changes.
Applied Numonyx branding.
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NUMONYX [ NUMONYX B.V ]
