DC and AC parameters
M25PE16
Table 20. Reset conditions
Test conditions specified in Table 14 and Table 15
Symbol
Alt.
Parameter
Conditions
Min.
Typ. Max. Unit
(1)
tRLRH
tRST Reset pulse width
10
µs
Chip should have been
deselected before reset is
de-asserted
Chip Select High to
Reset High
tSHRH
10
ns
1. Value guaranteed by characterization, not 100% tested in production.
(1)(2)
Table 21. Timings after a Reset Low pulse
Test conditions specified in Table 14 and Table 15
Conditions:
reset pulse occurred
Symbol Alt. Parameter
Min.
Typ.
Max.
Unit
While decoding an instruction(3)
WREN, WRDI, RDID, RDSR,
READ, RDLR, Fast_Read,
WRLR, PW, PP, PE, SE, BE,
SSE, DP, RDP
:
30
µs
Under completion of an erase or
program cycle of a PW, PP, PE,
SE, BE operation
300
µs
Reset
tRHSL tREC recovery
time
Under completion of an erase
cycle of an SSE operation
3
ms
tW (see
Table 18 or ms
Table 19)
Under completion of a WRSR
operation
Device deselected (S High) and
in standby mode
0
µs
1. All the values are guaranteed by characterization, and not 100% tested in production.
2. See Table 12 for a description of the device status after a Reset Low pulse.
3. S remains Low while Reset is Low.
Figure 28. Reset AC waveforms while a program or erase cycle is in progress
S
tSHRH
tRHSL
tRLRH
Reset
AI06808b
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NUMONYX [ NUMONYX B.V ]
