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M25PE20-VMP6G 参数 Datasheet PDF下载

M25PE20-VMP6G图片预览
型号: M25PE20-VMP6G
PDF下载: 下载PDF文件 查看货源
内容描述: 1和2兆,页擦除串行闪存与字节变性, 75兆赫的SPI总线,标准引脚 [1 and 2 Mbit, page-erasable serial Flash memories with byte alterability, 75 MHz SPI bus, standard pinout]
分类和应用: 闪存存储内存集成电路时钟
文件页数/大小: 64 页 / 1231 K
品牌: NUMONYX [ NUMONYX B.V ]
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Instructions  
M25PE20, M25PE10  
6.2  
Write Disable (WRDI)  
The Write Disable (WRDI) instruction (Figure 9) resets the Write Enable Latch (WEL) bit.  
The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the  
instruction code, and then driving Chip Select (S) High.  
The Write Enable Latch (WEL) bit is reset under the following conditions:  
Power-up  
Write Disable (WRDI) instruction completion  
Page Write (PW) instruction completion  
Page Program (PP) instruction completion  
Write Status Register (WRSR) instruction completion  
Write to Lock Register (WRLR) instruction completion  
Page Erase (PE) instruction completion  
SubSector Erase (SSE) instruction completion  
Sector Erase (SE) instruction completion  
Bulk Erase (BE) instruction completion  
Figure 9.  
Write Disable (WRDI) instruction sequence  
S
0
1
2
3
4
5
6
7
C
D
Q
Instruction  
High Impedance  
AI03750D  
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