Revision history
M25PE20, M25PE10
14
Revision history
Table 30. Document revision history
Date
Version
Changes
07-Dec-2004
0.1
Document written
Notes 1 and 2 removed from Table 29: Ordering information scheme.
S08N silhouette corrected on page 1.
21-Dec-2004
6-Oct-2005
0.2
1.0
Added Table 22: AC characteristics (33 MHz operation). Document status
promoted to full Datasheet. An easy way to modify data, A fast way to
modify data, Page Write (PW) and Page Program (PP) sections updated
to explain optimal use of Page Write and Page Program instructions. Clock
slew rate changed from 0.03 to 0.1 V/ns. Updated Table 29: Ordering
information scheme. Added ECOPACK® information.
Document converted to the new Numonyx template.
MLP package removed, SO8N package specifications updated (see
10-Jul-2006
2
Section 12: Package mechanical).
Figure 5: SPI modes supported updated and Note 2 added. Timing line of
tSHQZ moved in Figure 29.
50 MHz frequency added. VFQFPN package added (see Section 12:
Package mechanical).
The sectors are further divided up into subsectors (see Table 5: M25PE20
memory organization and Table 6: M25PE10 memory organization).
Important note on page 6 added. Figure 4: Bus master and memory
devices on the SPI bus updated and explanatory paragraph added. VCC
supply voltage and VSS ground added. Section 4.8: Protection modes
modified. Section 8: Reset added, Reset timings table split into Table 25:
Reset conditions and Table 26: Timings after a Reset Low pulse.
At power-up the WIP bit is reset and the Lock Registers are reset (see
Section 7: Power-up and power-down).
VIO max changed in Table 15: Absolute maximum ratings.
M25PE20 and M25PE10 products processed in T9HX process added to
datasheet:
25-Jan-2007
3
– WP pin replaces TSL (T7X technology), see Section 2.7: Write Protect
(W) or Top Sector Lock (TSL)
– Read Lock Register (RDLR), Write to Lock Register (WRLR), Write
Status Register (WRSR), SubSector Erase (SSE) and Bulk Erase (BE)
instructions added for T9HX process
– subsector protection granularity removed in T9HX process, still exists in
T7X process
– Table 5: M25PE20 memory organization and Table 6: M25PE10
memory organization updated to show subsectors
– Status Register BP1, BP0 bits and SRWD bit added.
Small text changes.
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NUMONYX [ NUMONYX B.V ]
