DC and AC parameters
M25PE20, M25PE10
Figure 29. Output timing
S
tCH
C
tCLQV
tCLQV
tCL
tSHQZ
tCLQX
tCLQX
LSB OUT
Q
D
tQLQH
tQHQL
ADDR.LSB IN
AI01449e
Table 25. Reset conditions
Test conditions specified in Table 16 and Table 17
Symbol
Alt.
Parameter
Conditions
Min. Typ. Max. Unit
(1)
tRLRH
tRST Reset Pulse width
10
10
µs
ns
Chip Select High to Reset Chip should have been deselected
High before Reset is de-asserted
tSHRH
1. Value guaranteed by characterization, not 100% tested in production.
(1)(2)
Table 26. Timings after a Reset Low pulse
Test conditions specified in Table 16 and Table 17
Conditions:
Reset pulse occurred
Symbol Alt.
Parameter
Max.
Unit
While decoding an instruction(3): WREN, WRDI, RDID,
RDSR, READ, RDLR, Fast_Read, WRLR, PW, PP, PE,
SE, BE, SSE, DP, RDP
30
µs
Under completion of an Erase or Program cycle of a
PW, PP, PE, SE, BE operation
300
3
µs
Reset recovery
time
tRHSL tREC
Under completion of an Erase cycle of an SSE
operation
ms
tW (see
Table 23 or
Table 24)
Under completion of a WRSR operation
ms
µs
Device deselected (S High) and in Standby mode
0
1. All the values are guaranteed by characterization, and not 100% tested in production.
2. See Table 14 for a description of the device status after a Reset Low pulse.
3. S remains Low while Reset is Low.
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NUMONYX [ NUMONYX B.V ]
