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M25P80-VMP6TG 参数 Datasheet PDF下载

M25P80-VMP6TG图片预览
型号: M25P80-VMP6TG
PDF下载: 下载PDF文件 查看货源
内容描述: 8兆位,低电压,串行闪存与75 MHz的SPI总线接口 [8 Mbit, low voltage, serial Flash memory with 75 MHz SPI bus interface]
分类和应用: 闪存存储内存集成电路时钟
文件页数/大小: 52 页 / 995 K
品牌: NUMONYX [ NUMONYX B.V ]
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Instructions  
M25P80  
6.9  
Sector Erase (SE)  
The Sector Erase (SE) instruction sets to 1 (FFh) all bits inside the chosen sector. Before it  
can be accepted, a Write Enable (WREN) instruction must previously have been executed.  
After the Write Enable (WREN) instruction has been decoded, the device sets the Write  
Enable Latch (WEL).  
The Sector Erase (SE) instruction is entered by driving Chip Select (S) Low, followed by the  
instruction code, and three address bytes on Serial Data Input (D). Any address inside the  
Sector (see Table 3) is a valid address for the Sector Erase (SE) instruction. Chip Select (S)  
must be driven Low for the entire duration of the sequence.  
The instruction sequence is shown in Figure 15.  
Chip Select (S) must be driven High after the eighth bit of the last address byte has been  
latched in, otherwise the Sector Erase (SE) instruction is not executed. As soon as Chip  
Select (S) is driven High, the self-timed Sector Erase cycle (whose duration is t ) is  
SE  
initiated. While the Sector Erase cycle is in progress, the Status Register may be read to  
check the value of the Write In Progress (WIP) bit. The Write In Progress (WIP) bit is 1  
during the self-timed Sector Erase cycle, and is 0 when it is completed. At some unspecified  
time before the cycle is completed, the Write Enable Latch (WEL) bit is reset.  
A Sector Erase (SE) instruction applied to a page which is protected by the Block Protect  
(BP2, BP1, BP0) bits (see Table 3 and Table 2) is not executed.  
Figure 15. Sector Erase (SE) instruction sequence  
S
0
1
2
3
4
5
6
7
8
9
29 30 31  
C
D
Instruction  
24 Bit Address  
23 22  
MSB  
2
0
1
AI03751D  
1. Address bits A23 to A20 are Don’t Care.  
30/52  
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