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M25P64-VMF6TP 参数 Datasheet PDF下载

M25P64-VMF6TP图片预览
型号: M25P64-VMF6TP
PDF下载: 下载PDF文件 查看货源
内容描述: 64兆位,低电压,串行闪存,具有50 MHz SPI总线接口 [64 Mbit, low voltage, Serial Flash memory with 50 MHz SPI bus interface]
分类和应用: 闪存内存集成电路光电二极管时钟
文件页数/大小: 50 页 / 943 K
品牌: NUMONYX [ NUMONYX B.V ]
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Revision history  
M25P64  
13  
Revision history  
Table 18. Document revision history  
Date  
Revision  
Changes  
28-Apr-2003  
15-May-2003  
20-Jun-2003  
18-Jul-2003  
02-Sep-2003  
0.1  
0.2  
0.3  
0.4  
0.5  
Target Specification Document written in brief form  
Target Specification Document written in full  
8x6 MLP8 and SO16(300 mil) packages added  
tPP, tSE and tBE revised  
Voltage supply range changed  
Table of contents, warning about exposed paddle on MLP8, and Pb-free  
options added  
19-Sep-2003  
17-Dec-2003  
15-Nov-2004  
0.6  
0.7  
1.0  
Value of tVSL(min) VWI, tPP(typ) and tBE(typ) changed. MLP8 package  
removed.  
Document status promoted from Target Specification to Preliminary Data.  
8x6 MLP8 package added. Minor wording changes.  
Deep Power-Down mode removed from datasheet (Figure 18: Read  
Electronic Signature (RES) instruction sequence and data-out sequence  
modified and tRES1 and tRES2 removed from Table 14: AC  
characteristics). SO16 Wide package specifications updated. End timing  
line of tSHQZ modified in Figure 24: Output timing. Figures moved below  
the corresponding instructions in the Instructions section.  
24-Feb-2005  
2.0  
Updated Page Program (PP) instructions in Page Programming, Page  
Program (PP) and Table 14: AC characteristics.  
Fast Program/Erase mode added and Power-up specified for Fast  
Program/Erase mode in Power-up and Power-down section. W pin  
changed to W/VPP. (see Write Protect/Enhanced Program supply voltage  
(W/VPP) description). Note 2 inserted below Figure 26 Blank option  
removed under Plating Technology.  
23-Dec-2005  
3.0  
tVPPHSL added to Table 14: AC characteristics and Figure 25: VPPH timing  
inserted.  
All packages are ECOPACK® compliant.  
Document status promoted from Preliminary Data to full Datasheet  
status.  
VDFPN8 (MLP8) package specifications updated (see Section 11:  
Package mechanical).  
16-Feb-2006  
07-Sep-2006  
4.0  
5
Figure 4: Bus master and memory devices on the SPI bus modified.  
I
CC1 maximum value updated in Table 13: DC characteristics.  
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