M25P64-VMF6TG 参数 Datasheet PDF下载

M25P64

Figure 1.

Logic diagram

V

CC

Description

D

C

S

W/V

PP

HOLD

M25P64

Q

V

SS

AI07485B

Table 1.

Signal names

Function

Serial Clock

Serial Data Input

Serial Data Output

Chip Select

Write Protect/Enhanced Program Supply Voltage

Hold

Supply Voltage

Ground

Direction

Input

Input

Output

Input

Input

Input

Signal name

C

D

Q

S

W/V

PP

HOLD

V

CC

V

SS

Figure 2.

VDFPN connections

M25P64

S

Q

W/V

PP

V

SS

1

2

3

4

8

7

6

5

V

CC

HOLD

C

D

AI08595B

1. There is an exposed central pad on the underside of the VDFPN package. This is pulled, internally, to V

SS

,

and must not be allowed to be connected to any other voltage or signal line on the PCB.

2. See

for package dimensions, and how to identify pin-1.

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