M25P20
MEMORY ORGANIZATION
The memory is organized as:
Table 3. Memory Organization
■
■
■
262,144 bytes (8 bits each)
4 sectors (512 Kbits, 65536 bytes each)
1024 pages (256 bytes each).
Sector
Address Range
3FFFFh
3
2
1
0
30000h
20000h
10000h
00000h
2FFFFh
1FFFFh
0FFFFh
Each page can be individually programmed (bits
are programmed from 1 to 0). The device is Sector
or Bulk Erasable (bits are erased from 0 to 1) but
not Page Erasable.
Figure 7. Block Diagram
HOLD
High Voltage
Generator
W
S
Control Logic
C
D
Q
I/O Shift Register
Status
Register
Address Register
and Counter
256 Byte
Data Buffer
3FFFFh
30000h
Size of the
read-only
memory area
20000h
10000h
00000h
000FFh
256 Bytes (Page Size)
X Decoder
AI04079
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