Numonyx™ Wireless Flash Memory (W18)
1.0
Introduction
This datasheet contains information about the Numonyx™ Wireless Flash Memory
(W18) device family. This section describes nomenclature used in the datasheet.
Section 2.0 provides an overview of the W18 flash memory device. Section 6.0,
Section 7.0, and Section 8.0 describe the electrical specifications for extended
temperature product offerings. Ordering information can be found in Section C.
The Numonyx™ Wireless Flash Memory (W18) device with flexible multi-partition dual-
operation architecture, provides high-performance Asynchronous and Synchronous
Burst reads. It is an ideal memory for low-voltage burst CPUs. Combining high read
performance with flash memory intrinsic non-volatility, the W18 device eliminates the
traditional system-performance paradigm of shadowing redundant code memory from
slow nonvolatile storage to faster execution memory. It reduces total memory
requirement that increases reliability and reduces overall system power consumption
and cost. The W18 device’s flexible multi-partition architecture allows program or erase
to occur in one partition while reading from another partition. This allows for higher
data write throughput compared to single-partition architectures and designers can
choose code and data partition sizes. The dual-operation architecture allows two
processors to interleave code operations while program and erase operations take place
in the background.
1.1
Nomenclature
Table 1:
Acronyms
APS
Automatic Power Savings
Block Base Address
BBA
CFI
Common Flash Interface
Command User Interface
Don’t Use
CUI
DU
EFP
Enhanced Factory Programming
Flash Data Integrator
No Connect
FDI
NC
OTP
PBA
RCR
RWE
RWW
SCSP
SRD
VF BGA
WSM
One-Time Programmable
Partition Base Address
Read Configuration Register
Read-While-Erase
Read-While-Write
Stacked Chip Scale Package
Status Register Data
Very-thin, Fine-pitch, Ball Grid Array
Write State Machine
November 2007
Order Number: 290701-18
Datasheet
7
NUMONYX [ NUMONYX B.V ]
