Numonyx™ Embedded Flash Memory (J3 v D, Monolithic)
Table 30: Byte-Wide Protection Register Addressing
Byte
Use
A8
A7
A6
A5
A4
A3
A2
A1
A0
LOCK
Both
Both
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
LOCK
0
Factory
Factory
Factory
Factory
Factory
Factory
Factory
Factory
User
1
2
3
4
5
6
7
8
9
User
A
User
B
User
C
User
D
E
User
User
F
User
Note: All address lines not specified in the above table must be 0 when accessing the Protection Register, i.e., A[MAX:9] = 0.
9.7.7
VPP/ VPEN Protection
When it’s necessary to protect the entire array, global protection can be achieved using
a hardware mechanism using VPP or VPEN. Whenever a valid voltage is present on VPP
or VPEN, blocks within the main flash array can be erased or programmed. By
grounding VPP or VPEN, blocks within the main array cannot be altered – attempts to
program or erase blocks will fail resulting in the setting of the appropriate error bit in
the Status Register. By holding VPP or VPEN low, absolute write protection of all blocks
in the array can be achieved.
Datasheet
46
December 2007
316577-06
NUMONYX [ NUMONYX B.V ]
