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JS28F320J3D75D 参数 Datasheet PDF下载

JS28F320J3D75D图片预览
型号: JS28F320J3D75D
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash, 2MX16, 75ns, PDSO56, 14 X 20 MM, LEAD FREE, TSOP-56]
分类和应用: 光电二极管内存集成电路
文件页数/大小: 66 页 / 769 K
品牌: NUMONYX [ NUMONYX B.V ]
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Numonyx™ Embedded Flash Memory (J3 v D, Monolithic)  
2.0  
Functional Overview  
The Numonyx™ Embedded Flash Memory (J3 v D) family contains high-density  
memory organized in any of the following configurations:  
• 32 Mbytes or 16 Mwords (256-Mbit), organized as two-hundred-fifty-six 128-Kbyte  
erase blocks.  
• 16 Mbytes or 8 Mwords (128-Mbit), organized as one-hundred-twenty-eight 128-  
Kbyte erase blocks.  
• 8 Mbytes or 4 Mwords (64-Mbit), organized as sixty-four 128-Kbyte erase blocks.  
• 4 Mbytes or 2 Mwords (32-Mbit), organized as thirty-two 128-Kbyte erase blocks.  
These devices can be accessed as 8- or 16-bit words. See Figure 1, “Memory Block  
Diagram, 32-, 64-, 128-, and 256-Mbit (monolithic)” on page 10 for further details.  
A 128-bit Protection Register has multiple uses, including unique flash device  
identification.  
The Numonyx™ Embedded Flash Memory (J3 v D) device includes new security  
features that were not available on the (previous) 0.25µm and 0.18µm versions of the  
J3 family. These new security features prevent altering of code through different  
protection schemes that can be implemented, based on user requirements.  
The Numonyx™ Embedded Flash Memory (J3 v D, Monolithic) optimized architecture  
and interface dramatically increases read performance by supporting page-mode reads.  
This read mode is ideal for non-clock memory systems.  
Its Common Flash Interface (CFI) permits software algorithms to be used for entire  
families of devices. This allows device-independent, JEDEC ID-independent, and  
forward- and backward-compatible software support for the specified flash device  
families. Flash vendors can standardize their existing interfaces for long-term  
compatibility.  
The Scalable Command Set (SCS) allows a single, simple software driver in all host  
systems to work with all SCS-compliant flash memory devices, independent of system-  
level packaging (e.g., memory card, SIMM, or direct-to-board placement). Additionally,  
SCS provides the highest system/device data transfer rates and minimizes device and  
system-level implementation costs.  
A Command User Interface (CUI) serves as the interface between the system processor  
and internal operation of the device. A valid command sequence written to the CUI  
initiates device automation. An internal Write State Machine (WSM) automatically  
executes the algorithms and timings necessary for block erase, program, and lock-bit  
configuration operations.  
A block erase operation erases one of the device’s 128-Kbyte blocks typically within one  
second, independent of other blocks. Each block can be independently erased 100,000  
times. Block erase suspend mode allows system software to suspend block erase to  
read or program data from any other block. Similarly, program suspend allows system  
software to suspend programming (byte/word program and write-to-buffer operations)  
to read data or execute code from any other block that is not being suspended.  
Each device incorporates a Write Buffer of 32 bytes (16 words) to allow optimum  
programming performance. By using the Write Buffer data is programmed more  
efficiently in buffer increments.  
Datasheet  
8
December 2007  
316577-06