P30
7.0
AC Characteristics
7.1
AC Test Conditions
Figure 11: AC Input/Output Reference Waveform
VCCQ
Input VCCQ/2
Test Points
VCCQ/2 Output
0V
IO_REF.WMF
Note: AC test inputs are driven at VCCQ for Logic "1" and 0 V for Logic "0." Input/output timing begins/ends at VCCQ/2. Input rise
and fall times (10% to 90%) < 5 ns. Worst case speed occurs at VCC = VCCMin.
Figure 12: Transient Equivalent Testing Load Circuit
Device
Out
Under Test
CL
Notes:
1.
2.
See the following table for component values.
Test configuration component value for worst-case speed conditions.
CL includes jig capacitance.
3.
.
Table 14: Test Configuration Component Value For Worst Case Speed Conditions
Test Configuration
CCQMin Standard Test
CL (pF)
V
30
Figure 13: Clock Input AC Waveform
R201
VIH
CLK [C]
VIL
R202
R203
Datasheet
28
November 2007
Order Number: 306666-11
NUMONYX [ NUMONYX B.V ]
