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290701-18 参数 Datasheet PDF下载

290701-18图片预览
型号: 290701-18
PDF下载: 下载PDF文件 查看货源
内容描述: 恒忆无线闪存( W18 ) [Numonyx Wireless Flash Memory (W18)]
分类和应用: 闪存无线
文件页数/大小: 102 页 / 1372 K
品牌: NUMONYX [ NUMONYX B.V ]
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Numonyx™ Wireless Flash Memory (W18)  
Table 15: AC Write Characteristics — 90 nm (Sheet 2 of 2)  
VCCQ  
=
1.7 V – 1.95 V  
#
Sym  
Parameter (1,2)  
Unit  
Notes  
Min  
Max  
W13  
W14  
W16  
W18  
W19  
W20  
W21  
W22  
W27  
W28  
tBHWH (tBHEH  
)
WP# Setup to WE# (CE#) High  
Write Recovery before Read  
WE# High to Valid Data  
WE# High to Address Valid  
WE# High to CLK Valid  
WE# High to ADV# High  
ADV# High to WE# Low  
CLK to WE# Low  
200  
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
3
tWHGL (tEHGL  
tWHQV  
tWHAV  
)
0
-
tAVQV +20  
-
-
3,6,10  
3,9,10  
3,10  
3,10  
11  
0
tWHCV  
12  
12  
-
tWHVH  
tVHWL  
-
<21  
<21  
tCHWL  
11  
tWHEL  
WE# High to CE# Low  
WE# High to ADV# Low  
0
0
tWHVL  
Notes:  
1.  
2.  
3.  
4.  
Write timing characteristics during erase suspend are the same as during write-only operations.  
A write operation can be terminated with either CE# or WE#.  
Sampled, not 100% tested.  
Write pulse width low (tWLWH or tELEH) is defined from CE# or WE# low (whichever occurs last) to CE# or WE# high  
(whichever occurs first). Hence, tWLWH = tELEH = tWLEH = tELWH  
Write pulse width high (tWHWL or tEHEL) is defined from CE# or WE# high (whichever is first) to CE# or WE# low  
(whichever is last). Hence, tWLWH = tEHEL = tWHEL = tEHWL  
.
5.  
6.  
.
System designers should take this into account and may insert a software No-Op instruction to delay the first read after  
issuing a command.  
7.  
For commands other than resume commands.  
VPP should be held at VPP1 or VPP2 until block erase or program success is determined.  
Applicable during asynchronous reads following a write.  
tWHCH/L OR tWHVH must be met when transitioning from a write cycle to a synchronous burst read. tWHCH/L and tWHVH both  
refer to the address latching event (either the rising/falling clock edge or the rising ADV# edge, whichever occurs first).  
The specifications tVHWL and tCHWL can be ignored if there is no clock toggling during the write bus cycle.  
8.  
9.  
10.  
11.  
Table 16: AC Write Characteristics — 130 nm (Sheet 1 of 2)  
VCCQ  
=
1.7 V – 2.24 V  
#
Sym  
Parameter (1,2)  
Unit  
Notes  
-60  
Min  
Max  
W1  
W2  
t
PHWL (tPHEL  
)
)
RST# High Recovery to WE# (CE#) Low  
CE# (WE#) Setup to WE# (CE#) Low  
WE# (CE#) Write Pulse Width Low  
Data Setup to WE# (CE#) High  
Address Setup to WE# (CE#) High  
CE# (WE#) Hold from WE# (CE#) High  
Data Hold from WE# (CE#) High  
Address Hold from WE# (CE#) High  
WE# (CE#) Pulse Width High  
150  
0
-
-
-
-
-
-
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
3
4
t
ELWL (tWLEL  
W3  
tWLWH (tELEH  
tDVWH (tDVEH  
AVWH (tAVEH  
WHEH (tEHWH  
)
40  
40  
40  
0
W4  
)
W5  
t
)
W6  
t
)
)
W7  
tWHDX (tEHDX  
tWHAX (tEHAX  
tWHWL (tEHEL  
tVPWH (tVPEH  
tQVVL  
0
W8  
)
)
0
W9  
20  
200  
0
5,6,7  
3
W10  
W11  
W12  
)
VPP Setup to WE# (CE#) High  
VPP Hold from Valid SRD  
3,8  
3,8  
tQVBL  
WP# Hold from Valid SRD  
0
November 2007  
Order Number: 290701-18  
Datasheet  
37