Absolute Maximum Ratings
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
V
CC
to GNDA
V
BB
to GNDA
Voltage at any Analog Input
or Output
7V
b
7V
Voltage at any Digital Input or
Output
V
CC
a
0 3V to GNDA
b
0 3V
b
25 C to
a
125 C
Operating Temperature Range
b
65 C to
a
150 C
Storage Temperature Range
Lead Temperature (Soldering 10 seconds)
300 C
V
CC
a
0 3V to V
BB
b
0 3V
ESD (Human Body Model)
Latch-Up Immunity
e
100 mA on any Pin
2000V
Electrical Characteristics
Unless otherwise noted
limits printed in
BOLD
characters are guaranteed for V
CC
e
5 0V
g
5% V
BB
e b
5 0V
g
5% T
A
e
0 C to 70 C by correlation with 100% electrical testing at T
A
e
25 C All other limits
are assured by correlation with other production tests and or product design and characterization All signals referenced to
GNDA Typicals specified at V
CC
e
5 0V V
BB
e b
5 0V T
A
e
25 C
Symbol
DIGITAL INTERFACE
V
IL
V
IH
V
OL
Input Low Voltage
Input High Voltage
Output Low Voltage
D
X
I
L
e
3 2 mA
SIG
R
I
L
e
1 0 mA
TS
X
I
L
e
3 2 mA Open Drain
D
X
I
H
eb
3 2 mA
SIG
R
I
H
eb
1 0 mA
GNDA
s
V
IN
s
V
IL
All Digital Inputs
V
IH
s
V
IN
s
V
CC
D
X
GNDA
s
V
O
s
V
CC
24
24
b
10
b
10
b
10
Parameter
Conditions
Min
Typ
Max
06
Units
V
V
V
V
V
V
V
22
04
04
04
V
OH
I
IL
I
IH
I
OZ
Output High Voltage
Input Low Current
Input High Current
Output Current in High Impedance
State (TRI-STATE)
Input Leakage Current
Input Resistance
Output Resistance
Load Resistance
Load Capacitance
Output Dynamic Range
Voltage Gain
Unity Gain Bandwidth
Offset Voltage
Common-Mode Voltage
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Output Resistance
Load Resistance
Load Capacitance
Output DC Offset Voltage
Power-Down Current
Power-Down Current
Power-Up Active Current
Power-Up Active Current
10
10
10
mA
mA
mA
ANALOG INTERFACE WITH TRANSMIT INPUT AMPLIFIER (ALL DEVICES)
I
I
XA
R
I
XA
R
O
XA
R
L
XA
C
L
XA
V
O
XA
A
V
XA
F
U
XA
V
OS
XA
V
CM
XA
CMRRXA
PSRRXA
R
O
RF
R
L
RF
C
L
RF
VOS
R
O
I
CC
0
I
BB
0
I
CC
1
I
BB
1
b
2 5V
s
V
s
a
2 5V VF
X
I
a
or VF
X
I
b
b
2 5V
s
V
s
a
2 5V VF
X
b
200
200
1
3
50
nA
MX
X
kX
pF
V
V V
MHz
I
a
or VF
X
I
b
10
10
b
2 8
Closed Loop Unity Gain
GS
X
GS
X
GS
X
R
L
t
10 kX
VF
X
I
a
to GS
X
5000
1
b
20
28
2
20
25
mV
V
dB
dB
CMRRXA
l
60 dB
DC Test
DC Test
Pin VF
R
O
VF
R
O
e
g
2 5V
b
2 5
60
60
1
600
500
b
200
ANALOG INTERFACE WITH RECEIVE FILTER (ALL DEVICES)
3
X
X
pF
mV
mA
mA
mA
mA
200
05
0 05
50
50
15
03
90
90
POWER DISSIPATION (ALL DEVICES)
No Load (Note)
No Load (Note)
No Load
No Load
Note
I
CC0
and I
BB0
are measured after first achieving a power-up state
5
NSC [ NATIONAL SEMICONDUCTOR ]
