Applications Information
POWER SUPPLIES
While the pins of the TP305X family are well protected
against electrical misuse, it is recommended that the stan-
dard CMOS practice be followed, ensuring that ground is
connected to the device before any other connections are
made. In applications where the printed circuit board may be
plugged into a ‘‘hot’’ socket with power and clocks already
present, an extra long ground pin in the connector should
be used.
This common ground point should be decoupled to V and
CC
V
with 10 mF capacitors.
BB
RECEIVE GAIN ADJUSTMENT
For applications where a TP305X family CODEC/filter re-
ceive output must drive a 600X load, but a peak swing lower
g
than 2.5V is required, the receive gain can be easily ad-
justed by inserting a matched T-pad or q-pad at the output.
Table II lists the required resistor values for 600X termina-
tions. As these are generally non-standard values, the equa-
tions can be used to compute the attenuation of the closest
practical set of resistors. It may be necessary to use un-
equal values for the R1 or R4 arms of the attenuators to
achieve a precise attenuation. Generally it is tolerable to
allow a small deviation of the input impedance from nominal
while still maintaining a good return loss. For example a 30
dB return loss against 600X is obtained if the output imped-
ance of the attenuator is in the range 282X to 319X (as-
suming a perfect transformer).
All ground connections to each device should meet at a
common point as close as possible to the GNDA pin. This
minimizes the interaction of ground return currents flowing
through a common bus impedance. 0.1 mF supply decou-
pling capacitors should be connected from this common
ground point to V
possible.
and V , as close to the device as
BB
CC
For best performance, the ground point of each CODEC/
FILTER on a card should be connected to a common card
ground in star formation, rather than via a ground bus.
T-Pad Attenuator
2
2
a
b
N
1
1
N
2
e
e
b
R1
R2
Z1
2 Z1.Z2
0
b
N
N
1
#
J
#
J
N
2 Z1.Z2
0
2
b
N
1
#
J
POWER IN
e
Where: N
POWER OUT
0
and
Z1
Z2
e
S
0
e
Also: Z
Z
Z
#
0
SC
OC
e
Where Z
impedance with short circuit termination
SC
e
and Z
OC
impedance with open circuit termination
q-Pad Attenuator
TL/H/5510–5
2
b
1
Z1.Z2
2
N
e
e
R3
R3
N
0
#
J
2
b
N
1
Z1
2
b
a
N
2NS
1
#
J
Note: See Application Note 370 for further details.
12
NSC [ National Semiconductor ]
