APPLICATION NOTE
This application note is divided into two sections: design
considerations and Application Circuits.
1.0 Design Considerations
This section covers the following design considerations:
1. Frequency and Phase Response Considerations
2. Unity-Gain Pulse Response Considerations
3. Input Bias Current Considerations
1.1 Frequency and Phase Response Considerations
The relationship between open-loop frequency response
and open-loop phase response determines the closed-loop
stability performance (negative feedback). The open-loop
phase response causes the feedback signal to shift towards
becoming positive feedback, thus becoming unstable. The
further the output phase angle is from the input phase angle,
the more stable the negative feedback will operate. Phase
Margin (φm) specifies this output-to-input phase relationship
at the unity-gain crossover point. Zero degrees of phase-
margin means that the input and output are completely in
phase with each other and will sustain oscillation at the unity-
gain frequency.
DS100128-61
FIGURE 2. Unity-Gain Frequency vs Common Mode
Voltage for Various Loads
1.2 Unity Gain Pulse Response Considerations
A pull-up resistor is well suited for increasing unity-gain,
pulse response stability. For example, a 600 Ω pull-up resis-
tor reduces the overshoot voltage by about 50%, when driv-
ing a 220 pF load. Figure 3 shows how to implement the
pull-up resistor for more pulse response stability.
The AC tables show φm for a no load condition. But φm
changes with load. The Gain and Phase margin vs Fre-
quency plots in the curve section can be used to graphically
determine the φm for various loaded conditions. To do this,
examine the phase angle portion of the plot, find the phase
margin point at the unity-gain frequency, and determine how
far this point is from zero degree of phase-margin. The larger
the phase-margin, the more stable the circuit operation.
The bandwidth is also affected by load. The graphs of Figure
1 and Figure 2 provide a quick look at how various loads af-
fect the φm and the bandwidth of the LMV821/822/824 family.
These graphs show capacitive loads reducing both φm and
bandwidth, while resistive loads reduce the bandwidth but in-
crease the φm. Notice how a 600Ω resistor can be added in
parallel with 220 picofarads capacitance, to increase the φm
20˚(approx.), but at the price of about a 100 kHz of band-
width.
DS100128-41
FIGURE 3. Using a Pull-up Resistor at the Output for
Stabilizing Capacitive Loads
Higher capacitances can be driven by decreasing the value
of the pull-up resistor, but its value shouldn’t be reduced be-
yond the sinking capability of the part. An alternate approach
is to use an isolation resistor as illustrated in Figure 4 .
Overall, the LMV821/822/824 family provides good stability
for loaded condition.
Figure 5 shows the resulting pulse response from a LMV824,
while driving a 10,000pF load through a 20 Ω isolation
resistor.
DS100128-43
FIGURE 4. Using an Isolation Resistor to Drive Heavy
Capacitive Loads
DS100128-60
FIGURE 1. Phase Margin vs Common Mode Voltage for
Various Loads
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