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LM3940IT-3.3 参数 Datasheet PDF下载

LM3940IT-3.3图片预览
型号: LM3940IT-3.3
PDF下载: 下载PDF文件 查看货源
内容描述: 1A低压降稳压5V至3.3V转换 [1A Low Dropout Regulator for 5V to 3.3V Conversion]
分类和应用:
文件页数/大小: 11 页 / 294 K
品牌: NSC [ National Semiconductor ]
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Application Hints  
EXTERNAL CAPACITORS  
The figure below shows the voltages and currents which are  
present in the circuit, as well as the formula for calculating  
the power dissipated in the regulator:  
The output capacitor is critical to maintaining regulator stabil-  
ity, and must meet the required conditions for both ESR  
(Equivalent Series Resistance) and minimum amount of ca-  
pacitance.  
MINIMUM CAPACITANCE:  
The minimum output capacitance required to maintain stabil-  
ity is 33 µF (this value may be increased without limit).  
Larger values of output capacitance will give improved tran-  
sient response.  
ESR LIMITS:  
The ESR of the output capacitor will cause loop instability if  
it is too high or too low. The acceptable range of ESR plotted  
versus load current is shown in the graph below. It is essen-  
tial that the output capacitor meet these requirements,  
or oscillations can result.  
DS012080-6  
=
=
I
P
I + I  
L G  
(V − V  
IN OUT  
IN  
) I + (V ) I  
IN G  
D
L
FIGURE 2. Power Dissipation Diagram  
The next parameter which must be calculated is the maxi-  
mum allowable temperature rise, TR (max). This is calcu-  
lated by using the formula:  
=
TR (max) TJ (max) − TA (max)  
Where: TJ (max) is the maximum allowable junction tem-  
perature, which is 125˚C for commercial  
grade parts.  
TA (max) is the maximum ambient temperature  
which will be encountered in the applica-  
tion.  
Using the calculated values for TR(max) and PD, the maxi-  
mum allowable value for the junction-to-ambient thermal re-  
sistance, θ(J−A), can now be found:  
=
θ(J−A) TR (max)/PD  
DS012080-5  
IMPORTANT: If the maximum allowable value for θ(J−A) is  
found to be 60˚C/W for the TO-220 package, 80˚C/W for  
the TO-263 package, or 174˚C/W for the SOT-223 pack-  
age, no heatsink is needed since the package alone will dis-  
sipate enough heat to satisfy these requirements.  
FIGURE 1. ESR Limits  
It is important to note that for most capacitors, ESR is speci-  
fied only at room temperature. However, the designer must  
ensure that the ESR will stay inside the limits shown over the  
entire operating temperature range for the design.  
If the calculated value for θ(J−A)falls below these limits, a  
heatsink is required.  
For aluminum electrolytic capacitors, ESR will increase by  
about 30X as the temperature is reduced from 25˚C to  
−40˚C. This type of capacitor is not well-suited for low tem-  
perature operation.  
HEATSINKING TO-220 PACKAGE PARTS  
The TO-220 can be attached to a typical heatsink, or se-  
cured to a copper plane on a PC board. If a copper plane is  
to be used, the values of θ(J−A) will be the same as shown in  
the next section for the TO-263.  
Solid tantalum capacitors have a more stable ESR over tem-  
perature, but are more expensive than aluminum electrolyt-  
ics. A cost-effective approach sometimes used is to parallel  
an aluminum electrolytic with a solid Tantalum, with the total  
capacitance split about 75/25% with the Aluminum being the  
larger value.  
If two capacitors are paralleled, the effective ESR is the par-  
allel of the two individual values. The “flatter” ESR of the Tan-  
talum will keep the effective ESR from rising as quickly at low  
temperatures.  
HEATSINKING  
A heatsink may be required depending on the maximum  
power dissipation and maximum ambient temperature of the  
application. Under all possible operating conditions, the junc-  
tion temperature must be within the range specified under  
Absolute Maximum Ratings.  
To determine if a heatsink is required, the power dissipated  
by the regulator, PD, must be calculated.  
5
www.national.com  
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