Output Voltage (VO)
Parameter Conditions
12V
LM2940
15V
LM2940
LM2940/833
Limit
LM2940/833
Limit
Units
Typ
Limit
Typ
Limit
(Note 5)
(Note 6)
(Note 5)
(Note 6)
Ripple Rejection
fO = 120 Hz, 1 Vrms
IO = 100 mA
LM2940
,
66
66
54/48
dBMIN
dBMIN
LM2940C
54
64
60
52
fO = 1 kHz, 1 Vrms
IO = 5 mA
,
52/46
48/42
Long Term
Stability
mV/
1000 Hr
VMAX
48
Dropout Voltage
IO = 1A
0.5
0.8/1.0
0.7/1.0
0.5
0.8/1.0
0.7/1.0
IO = 100 mA
(Note 7)
110
150/200
150/200
110
150/200
150/200
mVMAX
Short Circuit
Current
AMIN
1.9
1.6
1.6/1.3
1.9
1.6
1.6/1.3
Maximum Line
RO = 100Ω
Transient
75
55
60/60
LM2940, T ≤ 100 ms
LM2940/883, T ≤ 20 ms
LM2940C, T ≤ 1 ms
RO = 100Ω
LM2940, LM2940/883
LM2940C
40/40
40/40
VMIN
45
55
45
Reverse Polarity
DC Input
−30
−30
−15/−15
−15/−15
−15/−15
VMIN
Voltage
−15
−30
−15
Reverse Polarity
Transient Input
Voltage
RO = 100Ω
−75
−55
−50/−50
−45/−45
LM2940, T ≤ 100 ms
LM2940/883, T ≤ 20 ms
LM2940C, T ≤ 1 ms
−45/−45
−45/−45
VMIN
−55
−45/−45
Thermal Performance
Thermal Resistance
3-Lead TO-220
3-Lead TO-263
4
4
°C/W
Junction-to-Case, θ(JC)
3-Lead TO-220 (Note 2)
3-Lead TO-263 (Note 2)
SOT-223(Note 2)
60
Thermal Resistance
80
174
35
°C/W
Junction-to-Ambient, θ(JA)
8-Lead LLP (Note 2)
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Conditions are conditions under which the device
functions but the specifications might not be guaranteed. For guaranteed specifications and test conditions see the Electrical Characteristics.
Note 2: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ, the junction-to-ambient thermal resistance, θJA, and
the ambient temperature, TA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal
shutdown. The value of θJA (for devices in still air with no heatsink) is 60°C/W for the TO-220 package, 80°C/W for the TO-263 package, and 174°C/W for the
SOT-223 package. The effective value of θJA can be reduced by using a heatsink (see Application Hints for specific information on heatsinking). The value of
θ
JA for the LLP package is specifically dependent on PCB trace area, trace material, and the number of layers and thermal vias. For improved thermal resistance
and power dissipation for the LLP package, refer to Application Note AN-1187. It is recommended that 6 vias be placed under the center pad to improve thermal
performance.
Note 3: Refer to JEDEC J-STD-020C for surface mount device (SMD) package reflow profiles and conditions. Unless otherwise stated, the temperature and time
are for Sn-Pb (STD) only.
Note 4: ESD rating is based on the human body model, 100 pF discharged through 1.5 kΩ.
Note 5: All limits are guaranteed at TA = TJ = 25°C only (standard typeface) or over the entire operating temperature range of the indicated device (boldface type).
All limits at TA = TJ = 25°C are 100% production tested. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control
methods.
Note 6: All limits are guaranteed at TA = TJ = 25°C only (standard typeface) or over the entire operating temperature range of the indicated device (boldface type).
All limits are 100% production tested and are used to calculate Outgoing Quality Levels.
Note 7: Output current will decrease with increasing temperature but will not drop below 1A at the maximum specified temperature.
www.national.com
6
NSC [ National Semiconductor ]
