LM2940/LM2940C
Output Voltage (V
O
)
Parameter
Ripple Rejection
Conditions
f
O
= 120 Hz, 1 V
rms
,
I
O
= 100 mA
LM2940
LM2940C
f
O
= 1 kHz, 1 V
rms
,
I
O
= 5 mA
Long Term
Stability
Dropout Voltage
Short Circuit
Current
Maximum Line
Transient
I
O
= 1A
I
O
= 100 mA
(Note 7)
R
O
= 100Ω
LM2940, T
≤
100 ms
LM2940/883, T
≤
20 ms
LM2940C, T
≤
1 ms
Reverse Polarity
DC Input
Voltage
Reverse Polarity
Transient Input
Voltage
R
O
= 100Ω
LM2940, LM2940/883
LM2940C
R
O
= 100Ω
LM2940, T
≤
100 ms
LM2940/883, T
≤
20 ms
LM2940C, T
≤
1 ms
−55
−75
−30
−30
55
45
75
48
0.5
110
1.9
66
66
Typ
12V
LM2940
Limit
(Note 5)
LM2940/833
Limit
(Note 6)
Typ
15V
LM2940
Limit
(Note 5)
LM2940/833
Limit
(Note 6)
Units
54/48
54
52/46
60
0.8/1.0
150/200
1.6
0.7/1.0
150/200
1.6/1.3
0.5
110
1.9
0.8/1.0
150/200
1.6
0.7/1.0
150/200
1.6/1.3
64
52
48/42
dB
MIN
dB
MIN
mV/
1000 Hr
V
MAX
mV
MAX
A
MIN
60/60
40/40
55
−15/−15
−30
−15
45
−15/−15
V
MIN
40/40
V
MIN
−15/−15
−15
−50/−50
−45/−45
−45/−45
−55
−45/−45
−45/−45
V
MIN
Thermal Performance
Thermal Resistance
Junction-to-Case,
θ
(JC)
Thermal Resistance
Junction-to-Ambient,
θ
(JA)
3-Lead TO-220
3-Lead TO-263
3-Lead TO-220 (Note 2)
3-Lead TO-263 (Note 2)
SOT-223(Note 2)
8-Lead LLP (Note 2)
4
4
60
80
174
35
°C/W
°C/W
Note 1:
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Conditions are conditions under which the device
functions but the specifications might not be guaranteed. For guaranteed specifications and test conditions see the Electrical Characteristics.
Note 2:
The maximum allowable power dissipation is a function of the maximum junction temperature, T
J
, the junction-to-ambient thermal resistance,
θ
JA
, and
the ambient temperature, T
A
. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal
shutdown. The value of
θ
JA
(for devices in still air with no heatsink) is 60°C/W for the TO-220 package, 80°C/W for the TO-263 package, and 174°C/W for the
SOT-223 package. The effective value of
θ
JA
can be reduced by using a heatsink (see Application Hints for specific information on heatsinking). The value of
θ
JA
for the LLP package is specifically dependent on PCB trace area, trace material, and the number of layers and thermal vias. For improved thermal resistance
and power dissipation for the LLP package, refer to Application Note AN-1187. It is recommended that 6 vias be placed under the center pad to improve thermal
performance.
Note 3:
Refer to JEDEC J-STD-020C for surface mount device (SMD) package reflow profiles and conditions. Unless otherwise stated, the temperature and time
are for Sn-Pb (STD) only.
Note 4:
ESD rating is based on the human body model, 100 pF discharged through 1.5 kΩ.
Note 5:
All limits are guaranteed at T
A
= T
J
= 25°C only (standard typeface) or over the entire operating temperature range of the indicated device (boldface type).
All limits at T
A
= T
J
= 25°C are 100% production tested. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control
methods.
Note 6:
All limits are guaranteed at T
A
= T
J
= 25°C only (standard typeface) or over the entire operating temperature range of the indicated device (boldface type).
All limits are 100% production tested and are used to calculate Outgoing Quality Levels.
Note 7:
Output current will decrease with increasing temperature but will not drop below 1A at the maximum specified temperature.
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