feedback resistor to eliminate the overshoot. See the section
LOAD STEP RESPONSE for more details on CFF
.
When one channel gets into over-current protection mode,
the operation of the other channel will not be affected.
The above analysis serves as a starting point. It is a good
practice to always verify loop gain on bench.
LOOP STABILITY
To the first order approximation, the LM26400Y has a VFB-to-
Inductor Current transfer admittance (i.e. ratio of inductor
current to FB pin voltage, in frequency domain) close to the
plot in Figure 1. The transfer admittance has a DC value of
104dBS (dBS stands for decibel Siemens. The equivelant of
0dBS is 1 Siemens.). There is a pole at 1Hz and a zero at
approximately 8kHz. The plateau after the 8kHz zero is about
27dBS. There are also high frequency poles that are not
shown in the figure. They include a double pole at 1.2MHz or
so, and another double pole at half the switching frequency.
Depending on factors such as inductor ripple size and duty
cycle, the double pole at half the switching frequency may
become two separate poles near half the switching frequency.
LOAD STEP RESPONSE
In general, the excursion in output voltage caused by a load
step can be reduced by increasing the output capacitance.
Besides that, increasing the small-signal loop bandwidth also
helps. This can be achieved by adding a 27nF or so capacitor
(CFF) in parallel with the upper feedback resistor (assuming
the lower feedback resistor is 5.9kΩ). See Figure 2 for an il-
lustration.
20200251
FIGURE 2. Adding a CFF Capacitor
The responses to a load step between 0.2A and 2A with and
without a CFF are shown in Figure 3. The higher loop band-
width as a result of CFF reduces the total output excursion by
about 80mV.
20200250
FIGURE 1. VFB-to-Inductor Current Transfer Admittance
An easy strategy to build a stable loop with reasonable phase
margin is to try to cross over between 20kHz and 100kHz,
assuming the output capacitor is ceramic. When using pure
ceramic capacitors at the output, simply use the following
equation to find out the crossover frequency.
where 22S (22 Siemens) is the equivelant of the 27dBS trans-
fer admittance mentioned above and r is the ratio of 0.6V to
the output voltage. Use the same equation to find out the
needed output capacitance for a given crossover frequency.
Phase margin is typically between 50° and 60°. Notice the
above equation is only good for a crossover between 20kHz
and 100kHz. A crossover frequency outside this range may
result in lower phase margin and less accurate prediction by
the above equation.
20200242
FIGURE 3. CFF Improves Load Step Response
Use the following equation to calculate the new loop band-
width:
Example: VOUT = 2.5V, COUT = 36µF, find out the crossover
frequency.
Again, the assumption is the crossover is between 20kHz and
100kHz.
Assume the crossover is between 20kHz and 100kHz. Then
In an extreme case where the load goes to less than 100mA
during a large load step, output voltage may exhibit extra un-
13
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