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DS90C383AMTD 参数 Datasheet PDF下载

DS90C383AMTD图片预览
型号: DS90C383AMTD
PDF下载: 下载PDF文件 查看货源
内容描述: + 3.3V可编程LVDS发射器24位平板显示器( FPD )链路- 65 MHz的+ 3.3V LVDS发射器24位平板显示器( FPD )链路65兆赫 [+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz +3.3V LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz]
分类和应用: 线路驱动器或接收器显示器驱动程序和接口接口集成电路光电二极管
文件页数/大小: 11 页 / 304 K
品牌: NSC [ NATIONAL SEMICONDUCTOR ]
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DS90C383A/DS90CF383A +3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD)
Link-65 MHz, +3.3V LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz
May 2003
DS90C383A/DS90CF383A
+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel
Display (FPD) Link-65 MHz +3.3V LVDS Transmitter
24-Bit Flat Panel Display (FPD) Link-65 MHz
General Description
The DS90C383A/DS90CF383A transmitter converts 28 bits
of CMOS/TTL data into four LVDS (Low Voltage Differential
Signaling) data streams. A phase-locked transmit clock is
transmitted in parallel with the data streams over a fifth
LVDS link. Every cycle of the transmit clock 28 bits of input
data are sampled and transmitted. At a transmit clock fre-
quency of 65 MHz, 24 bits of RGB data and 3 bits of LCD
timing and control data (FPLINE, FPFRAME, DRDY) are
transmitted at a rate of 455 Mbps per LVDS data channel.
Using a 65 MHz clock, the data throughput is 227 Mbytes/
sec. The DS90C383A transmitter can be programmed for
Rising edge strobe or Falling edge strobe through a dedi-
cated pin. The DS90CF383A is fixed as a Falling edge
strobe transmitter. A Rising edge or Falling edge strobe
transmitter will interoperate with a Falling edge strobe Re-
ceiver (DS90CF384) without any translation logic.
This chipset is an ideal means to solve EMI and cable size
problems associated with wide, high speed TTL interfaces.
Features
n
20 to 65 MHz shift clock support
n
Rejects
>
±
3ns Jitter from VGA chip with less than
225ps output Jitter
@
65MHz (TJCC)
n
Best–in–Class Set & Hold Times on TxINPUTs
n
Tx power consumption
<
130 mW (typ)
@
65MHz
Grayscale
n
>
50% Less Power Dissipation than BiCMOS
Alternatives
n
Tx Power-down mode
<
200µW (max)
n
ESD rating
>
7 kV (HBM),
>
500V (EIAJ)
n
Supports VGA, SVGA, XGA and Dual Pixel SXGA.
n
Narrow bus reduces cable size and cost
n
Up to 1.8 Gbps throughput
n
Up to 227 Megabytes/sec bandwidth
n
345 mV (typ) swing LVDS devices for low EMI
n
PLL requires no external components
n
Compatible with TIA/EIA-644 LVDS standard
n
Low profile 56-lead TSSOP package
n
Improved replacement for:
SN75LVDS83 — DS90C383A
SN75LVDS81 — DS90CF383A
Block Diagram
DS90C383A/DS90CF383A
10010001
Order Number DS90C383AMTD or DS90CF383AMTD
See NS Package Number MTD56
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
© 2003 National Semiconductor Corporation
DS100100
www.national.com