AC Test Circuit and Switching Time Waveforms (Continued)
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FIGURE 5. Propagation Delay for “LS-Type” Load (Notes 7, 9)
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FIGURE 6. Enable and Disable Times for “LS-Type” Load (Notes 8, 9)
Note 7: Diagram shown for ENABLE low.
Note 8: S1 and S2 of load circuit are closed except where shown.
Note 9: Pulse generator for all pulses: Rate ≤ 1.0 MHz; Z = 50Ω; t ≤ 15 ns; t ≤ 6.0 ns.
O
r
f
Truth Table
ENABLE ENABLE
Input
Output
L
H
X
Z
H
L
All Other
VID ≥ V
VID ≤ V
(Max)
(Min)
TH
TH
Combinations of
Enable Inputs
Open
H
Z = TRI-STATE
Typical Applications
Two-Wire Balanced Systems, RS-422
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5
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