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CRCW08052101F 参数 Datasheet PDF下载

CRCW08052101F图片预览
型号: CRCW08052101F
PDF下载: 下载PDF文件 查看货源
内容描述: 同步降压控制器具有预偏置启动和可选时钟同步 [Synchronous Buck Controller with Pre-bias Startup, and Optional Clock Synchronization]
分类和应用: 控制器时钟
文件页数/大小: 23 页 / 1006 K
品牌: NSC [ National Semiconductor ]
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on. (The point of peak inductor current, see Figure 12). Note  
that in normal operation mode the high-side MOSFET al-  
ways turns on at the beginning of a clock cycle. In current  
limit mode, by contrast, the high-side MOSFET on-pulse is  
skipped. This causes inductor current to fall. Unlike a normal  
operation switching cycle, however, in a current limit mode  
switching cycle the high-side MOSFET will turn on as soon  
as inductor current has fallen to the current limit threshold.  
The LM2747 will continue to skip high-side MOSFET pulses  
until the inductor current peak is below the current limit  
threshold, at which point the system resumes normal opera-  
tion.  
Application Information (Continued)  
POWER GOOD SIGNAL  
The open drain output on the Power Good pin needs a  
pull-up resistor to a low voltage source. The pull-up resistor  
should be chosen so that the current going into the Power  
Good pin is less than 1 mA. A 100 kresistor is recom-  
mended for most applications.  
The Power Good signal is an OR-gated flag which takes into  
account both output overvoltage and undervoltage condi-  
tions. If the feedback pin (FB) voltage is 18% above its  
nominal value (118% x VFB = 0.708V) or falls 28% below that  
value (72% x VFB = 0.42V) the Power Good flag goes low.  
The Power Good flag can be used to signal other circuits that  
the output voltage has fallen out of regulation, however the  
switching of the LM2747 continues regardless of the state of  
the Power Good signal. The Power Good flag will return to  
logic high whenever the feedback pin voltage is between  
72% and 118% of 0.6V.  
UVLO  
The 2.79V turn-on threshold on VCC has a built in hysteresis  
of about 300 mV. If VCC drops below 2.42V, the chip defi-  
nitely enters UVLO mode. UVLO consists of turning off the  
top and bottom MOSFETS and remaining in that condition  
until VCC rises above 2.79V. As with normal shutdown initi-  
ated by the SD pin, the soft-start capacitor is discharged  
through an internal MOSFET, ensuring that the next start-up  
will be controlled by the soft-start circuitry.  
CURRENT LIMIT  
Current limit is realized by sensing the voltage across the  
low-side MOSFET while it is on. The RDSON of the MOSFET  
is a known value; hence the current through the MOSFET  
can be determined as:  
20150988  
FIGURE 12. Current Limit Threshold  
Unlike a high-side MOSFET current sensing scheme, which  
limits the peaks of inductor current, low-side current sensing  
is only allowed to limit the current during the converter  
off-time, when inductor current is falling. Therefore in a typi-  
cal current limit plot the valleys are normally well defined, but  
the peaks are variable, according to the duty cycle. The  
PWM error amplifier and comparator control the off-pulse of  
the high-side MOSFET, even during current limit mode,  
meaning that peak inductor current can exceed the current  
limit threshold. Assuming that the output inductor does not  
saturate, the maximum peak inductor current during current  
limit mode can be calculated with the following equation:  
VDS = IOUT x RDSON  
The current through the low-side MOSFET while it is on is  
also the falling portion of the inductor current. The current  
limit threshold is determined by an external resistor, RCS  
,
connected between the switching node and the ISEN pin. A  
constant current (ISEN-TH) of 40 µA typical is forced through  
RCS, causing a fixed voltage drop. This fixed voltage is  
compared against VDS and if the latter is higher, the current  
limit of the chip has been reached. To obtain a more accurate  
value for RCS you must consider the operating values of  
RDSON and ISEN-TH at their operating temperatures in your  
application and the effect of slight parameter differences  
from part to part. RCS can be found by using the following  
equation using the RDSON value of the low side MOSFET at  
it’s expected hot temperature and the absolute minimum  
value expected over the full temperature range for the for the  
ISEN-TH which is 25 µA:  
Where TSW is the inverse of switching frequency fSW. The  
200 ns term represents the minimum off-time of the duty  
cycle, which ensures enough time for correct operation of  
the current sensing circuitry.  
RCS = RDSON-HOT x ILIM / ISEN-TH  
In order to minimize the time period in which peak inductor  
current exceeds the current limit threshold, the IC also dis-  
charges the soft-start capacitor through a fixed 90 µA sink.  
The output of the LM2747 internal error amplifier is limited by  
the voltage on the soft-start capacitor. Hence, discharging  
the soft-start capacitor reduces the maximum duty cycle D of  
the controller. During severe current limit this reduction in  
duty cycle will reduce the output voltage if the current limit  
conditions last for an extended time. Output inductor current  
For example, a conservative 15A current limit in a 10A  
design with a RDSON-HOT of 10 mwould require a 6 kΩ  
resistor. The minimum value for RCS in any application is 1  
k. Because current sensing is done across the low-side  
MOSFET, no minimum high-side on-time is necessary. The  
LM2747 enters current limit mode if the inductor current  
exceeds the current limit threshold at the point where the  
high-side MOSFET turns off and the low-side MOSFET turns  
13  
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