54AC161
•
54ACT161 Synchronous Presettable Binary Counter
November 1998
54AC161
•
54ACT161
Synchronous Presettable Binary Counter
General Description
The ’AC/’ACT161 are high-speed synchronous modulo-16
binary counters. They are synchronously presettable for ap-
plication in programmable dividers and have two types of
Count Enable inputs plus a Terminal Count output for versa-
tility in forming synchronous multistage counters. The ’AC/
’ACT161 has an asynchronous Master Reset input that over-
rides all other inputs and forces the outputs LOW.
n
n
n
n
n
n
Synchronous counting and loading
High-speed synchronous expansion
Typical count rate of 125 MHz
Outputs source/sink 24 mA
’ACT161 has TTL-compatible inputs
Standard Microcircuit Drawing (SMD)
— ’AC161: 5962-89561
— ’ACT161: 5962-91722
Features
n
I
CC
reduced by 50%
Logic Symbols
Pin Names
CEP
CET
CP
MR
P
0
–P
3
PE
Q
0
–Q
3
TC
DS100274-1
Description
Count Enable Parallel Input
Count Enable Trickle Input
Clock Pulse Input
Asynchronous Master Reset Input
Parallel Data Inputs
Parallel Enable Inputs
Flip-Flop Outputs
Terminal Count Output
IEEE/IEC
DS100274-2
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
FACT
™
is a trademark of Fairchild Semiconductor Corporation.
© 1998 National Semiconductor Corporation
DS100274
www.national.com
NSC [ NATIONAL SEMICONDUCTOR ]
