Connection Diagrams
(Continued)
Storage from
Bus to Register
Real Time Transfer
A-Bus to B-Bus
DS100209-7
DS100209-5
FIGURE 3.
Transfer from
Register to Bus
FIGURE 1.
Real Time Transfer
B-Bus to A-Bus
DS100209-8
DS100209-6
FIGURE 4.
FIGURE 2.
Inputs
OE
H
H
H
L
L
L
L
L
L
L
L
DIR
X
X
X
H
H
H
H
L
L
L
L
CPAB
H or L
N
Data I/O
(Note 1)
X
X
X
L
L
H
H
X
X
X
X
X
X
X
X
X
X
X
L
L
H
H
Output
Input
Input Output
Input
Input
Isolation
Function
CPBA SAB SBA A
0
–A
7
B
0
–B
7
H or L
X
N
Clock A
n
Data into A Register
Clock B
n
Data into B Register
A
n
to B
n
— Real Time (Transparent Mode)
Clock A
n
Data into A Register
A Register to B
n
(Stored Mode)
Clock A
n
Data into A Register and Output to B
n
B
n
to A
n
— Real Time (Transparent Mode)
Clock B
n
Data into B Register
B Register to A
n
(Stored Mode)
Clock B
n
Data into B Register and Output to A
n
X
X
N
X
X
X
X
X
N
H or L
N
X
X
X
X
H or L
N
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
N
= LOW-to-HIGH Transition
Note 1:
The data output functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled; i.e., data at
the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs.
3
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