Functional Description
Inputs
CP
Internal Outputs
Function
The ’ABT574 consists of eight edge-triggered flip-flops with
individual D-type inputs and TRI-STATE true outputs. The
buffered clock and buffered Output Enable are common to all
flip-flops. The eight flip-flops will store the state of their indi-
vidual D inputs that meet the setup and hold times require-
ments on the LOW-to-HIGH Clock (CP) transition. With the
Output Enable (OE) LOW, the contents of the eight flip-flops
are available at the outputs. When OE is HIGH, the outputs
are in a high impedance state. Operation of the OE input
does not affect the state of the flip-flops.
OE
H
H
H
L
D
H
L
Q
NC
L
O
Z
H or L
N
Hold
Load
Load
Z
N
H
L
H
Z
N
L
L
Data Available
N
L
H
L
H
H
Data Available
L
H or L
H or L
NC
NC
NC
NC
No Change in Data
No Change in Data
L
H
=
=
=
=
H
L
X
HIGH Voltage Level
LOW Voltage Level
Immaterial
Function Table
Z
High Impedance
Inputs
Internal Outputs
Function
N =
LOW-to-HIGH Transition
=
NC No Change
OE
CP
D
Q
O
H
H or L
L
NC
Z
Hold
Logic Diagram
DS100208-3
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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