Functional Description
The ’ABT574 consists of eight edge-triggered flip-flops with
individual D-type inputs and TRI-STATE true outputs. The
buffered clock and buffered Output Enable are common to all
flip-flops. The eight flip-flops will store the state of their indi-
vidual D inputs that meet the setup and hold times require-
ments on the LOW-to-HIGH Clock (CP) transition. With the
Output Enable (OE) LOW, the contents of the eight flip-flops
are available at the outputs. When OE is HIGH, the outputs
are in a high impedance state. Operation of the OE input
does not affect the state of the flip-flops.
OE
H
H
H
L
L
L
L
Inputs
CP
H or L
N
N
N
N
Internal Outputs
D
H
L
H
L
H
L
H
Q
NC
L
H
L
H
NC
NC
O
Z
Z
Z
L
H
NC
NC
Hold
Load
Load
Function
Data Available
Data Available
No Change in Data
No Change in Data
H or L
H or L
Function Table
Inputs
OE
H
CP
H or L
D
L
Internal Outputs
Q
NC
O
Z
Hold
Function
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
N
= LOW-to-HIGH Transition
NC = No Change
Logic Diagram
DS100208-3
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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