Logic Diagrams
151A
Address Buffers for
54151A/74151A
TL/F/6546–5
TL/F/6546–4
See Address Buffers Below
Function Tables
54150/74150
54151A/75151A
Inputs
B
Inputs
Outputs
Outputs
W
Select
Strobe
Select
B
Strobe
S
Y
W
S
D
C
A
C
A
X
L
X
L
X
L
X
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
X
L
X
L
X
L
H
L
L
L
L
L
L
L
L
L
H
E0
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
L
L
L
H
L
E1
L
L
H
L
L
L
H
H
L
E2
L
H
H
L
L
L
H
L
E3
L
H
L
L
H
H
H
H
L
E4
H
H
H
H
L
L
H
L
E5
L
H
L
L
H
H
L
E6
H
H
L
H
L
E7
H
H
H
H
H
H
H
H
H
E8
e
e
e
Low Level, X Don’t Care
H
High Level, L
L
L
H
L
E9
e
D0, D1 . . . D7
the level of the respective D input
L
H
H
L
E10
E11
E12
E13
E14
E15
L
H
L
H
H
H
H
L
H
L
H
H
H
e
e
e
Low Level, X Don’t Care
H
High Level, L
e
E0, E1 . . . E15
the complement of the level of the respective E input
6
NSC [ National Semiconductor ]
