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30144-23 参数 Datasheet PDF下载

30144-23图片预览
型号: 30144-23
PDF下载: 下载PDF文件 查看货源
内容描述: 的Geode ™ GXLV处理器系列的低功耗X86集成解决方案 [Geode⑩ GXLV Processor Series Low Power Integrated x86 Solutions]
分类和应用: 微控制器和处理器外围集成电路微处理器时钟
文件页数/大小: 247 页 / 4117 K
品牌: NSC [ National Semiconductor ]
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Integrated Functions (Continued)  
4.3.6 Memory Cycles  
SDRAM Read Cycle  
Figures 4-5 through 4-8 illustrate various memory cycles  
that the memory controller supports. The following sub-  
sections describe some of the supported cycles.  
Figure 4-5 shows a SDRAM read cycle. The figure  
assumes that a previous ACT command has presented  
the row address for the read operation. Note that the burst  
length for the READ command is always two.  
SDCLK  
CS#  
RAS#  
CAS#  
WE#  
MA  
DQM  
MD  
COL n  
n
n+1  
Figure 4-5. Basic Read Cycle with a CAS Latency of Two  
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