Processor Programming (Continued)
3.3.1.2 Segment Registers
The active segment register is selected according to the
rules listed in Table 3-3 and the type of instruction being
currently processed. In general, the DS register selector is
used for data references. Stack references use the SS
register, and instruction fetches use the CS register. While
some of these selections may be overridden, instruction
fetches, stack operations, and the destination write opera-
tion of string operations cannot be overridden. Special
segment-override instruction prefixes allow the use of
alternate segment registers. These segment registers
include the ES, FS, and GS registers.
The 16-bit segment registers, part of the main memory
addressing mechanism, are described in Section 3.5 “Off-
set, Segment, and Paging Mechanisms” on page 61. The
six segment registers are:
CS
DS
SS
ES
FS
GS
-
-
-
-
-
-
Code Segment
Data Segment
Stack Segment
Extra Segment
Additional Data Segment
Additional Data Segment
3.3.1.3 Instruction Pointer Register
The segment registers are used to select segments in
main memory. A segment acts as private memory for dif-
ferent elements of a program such as code space, data
space, and stack space.
The Instruction Pointer (EIP) Register contains the off-
set into the current code segment of the next instruction to
be executed. The register is normally incremented by the
length of the current instruction with each instruction exe-
cution unless it is implicitly modified through an interrupt,
exception, or an instruction that changes the sequential
execution flow (for example JMP and CALL).
There are two segment mechanisms, one for real and vir-
tual 8086 operating modes and one for protective mode.
Initialization and transition to protective mode is described
in Section 3.13.4 “Initialization and Transition to Protected
Mode” on page 87. The segment mechanisms are
described in Section 3.7 “Descriptors and Segment Mech-
anisms” on page 62.
Table 3-3 illustrates the code segment selection rules.
Table 3-3. Segment Register Selection Rules
Implied (Default)
Segment-Override
Prefix
Type of Memory Reference
Segment
Code Fetch
CS
SS
SS
ES
DS
None
Destination of PUSH, PUSHF, INT, CALL, PUSHA instructions
Source of POP, POPA, POPF, IRET, RET instructions
Destination of STOS, MOVS, REP STOS, REP MOVS instructions
None
None
None
Other data references with effective address using base registers of:
EAX, EBX, ECX, EDX, ESI, EDI, EBP, ESP
CS, ES, FS, GS, SS
SS
CS, DS, ES, FS, GS
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