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30134-23 参数 Datasheet PDF下载

30134-23图片预览
型号: 30134-23
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内容描述: 的Geode ™ GXLV处理器系列的低功耗X86集成解决方案 [Geode⑩ GXLV Processor Series Low Power Integrated x86 Solutions]
分类和应用: 外围集成电路时钟
文件页数/大小: 247 页 / 4117 K
品牌: NSC [ National Semiconductor ]
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Processor Programming (Continued)  
3.3 REGISTER SETS  
The accessible registers in the processor are grouped into  
three sets:  
3.3.1.1 General Purpose Registers  
The General Purpose Registers are divided into four data  
registers, two pointer registers, and two index registers as  
shown in Table 3-2.  
1) The Application Register Set contains the registers  
frequently used by application programmers. Table 3-  
2 shows the General Purpose, Segment, the Instruc-  
tion Pointer and the EFLAGS Registers.  
The Data Registers are used by the applications pro-  
grammer to manipulate data structures and to hold the  
results of logical and arithmetic operations. Different por-  
tions of general data registers can be addressed by using  
different names.  
2) The System Register Set contains the registers typi-  
cally reserved for operating systems programmers:  
Control, System Address, Debug, Configuration, and  
Test Registers.  
An “E” prefix identifies the complete 32-bit register. An “X”  
suffix without the “E” prefix identifies the lower 16 bits of  
the register.  
3) The Model Specific Register (MSR) Set is used to  
monitor the performance of the processor or a  
specific component within the processor. The Model  
Specific Register set has one 64-bit register called  
the Time Stamp Counter.  
The lower two bytes of a data register are addressed with  
an “H” suffix (identifies the upper byte) or an “L” suffix (iden-  
tifies the lower byte). These _L and _H portions of the  
data registers act as independent registers. For example,  
if the AH register is written to by an instruction, the AL reg-  
ister bits remain unchanged.  
Each of these register sets are discussed in detail in the  
subsections that follow. Additional registers to support  
integrated GXLV processor subsystems are described in  
Section 4.1 “Integrated Functions Programming Interface”  
on page 97.  
The Pointer and Index Registers are listed below.  
SI or ESI  
Source Index  
Destination Index  
Stack Pointer  
Base Pointer  
3.3.1 Application Register Set  
DI or EDI  
SP or ESP  
BP or EBP  
The Application Register Set consists of the registers most  
often used by the applications programmer. These regis-  
ters are generally accessible, although some bits in the  
EFLAGS register are protected.  
These registers can be addressed as 16- or 32-bit registers,  
with the “E” prefix indicating 32 bits. The Pointer and Index  
Registers can be used as general purpose registers; how-  
ever, some instructions use a fixed assignment of these  
registers. For example, repeated string operations always  
use ESI as the source pointer, EDI as the destination  
pointer, and ECX as a counter. The instructions that use  
fixed registers include multiply and divide, I/O access,  
string operations, stack operations, loop, variable shift and  
rotate, and translate instructions.  
The General Purpose Register contents are frequently  
modified by instructions and typically contain arithmetic  
and logical instruction operands.  
In real mode, Segment Registers contain the base  
address for each segment. In protected mode, the seg-  
ment registers contain segment selectors. The segment  
selectors provide indexing for tables (located in memory)  
that contain the base address for each segment, as well  
as other memory addressing information.  
The GXLV processor implements a stack using the ESP  
Register. This stack is accessed during the PUSH and  
POP instructions, procedure calls, procedure returns,  
interrupts, exceptions, and interrupt/exception returns.  
The GXLV processor automatically adjusts the value of  
the ESP during operations that result from these instruc-  
tions.  
The Instruction Pointer Register points to the next  
instruction that the processor will execute. This register is  
automatically incremented by the processor as execution  
progresses.  
The EFLAGS Register contains control bits used to  
reflect the status of previously executed instructions. This  
register also contains control bits that affect the operation  
of some instructions.  
The EBP Register may be used to refer to data passed on  
the stack during procedure calls. Local data may also be  
placed on the stack and accessed with BP. This register  
provides a mechanism to access stack data in high-level  
languages.  
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