Integrated Functions (Continued)
4.6 PCI CONTROLLER
The GXm processor includes an integrated PCI controller
with the following features.
4.6.4 Generating Configuration Cycles
Configuration space is a physical address space unique to
PCI. Configuration Mechanism #1 must be used by soft-
ware to generate configuration cycles. Two DWORD I/O
locations are used in this mechanism. The first DWORD
location (CF8h) references a read/write register that is
named CONFIG_ADDRESS. The second DWORD
4.6.1 X-Bus PCI Slave
•
•
•
•
•
•
16-byte PCI write buffer
16-byte PCI read buffer from X-bus
Supports cache line bursting
Write/Inv line support
Pacing of data for read or write operations with X-bus
No active byte enable transfers supported
address (CFCh) references
CONFIG_DATA. The general method for accessing con-
figuration space is to write value into
a
register named
a
CONFIG_ADDRESS that specifies the PCI bus, device on
that bus, and configuration register in that device being
accessed. A read or write to CONFIG_DATA will then
cause the bridge to translate that CONFIG_ADDRESS
value to the requested configuration cycle on the PCI bus.
4.6.2 X-Bus PCI Master
•
•
•
•
•
16 byte X-bus to PCI write buffer
Configuration read/write Support
Int Acknowledge support
Lock conversion
Support fast back-to-back cycles as slave
4.6.5 Generating Special Cycles
A special cycle is a broadcast message to the PCI bus.
Two hardcoded special cycle messages are defined in the
command encode: HALT and SHUTDOWN. Software can
also generate special cycles by using special cycle gener-
ation for configuration mechanism #1 as described in the
PCI Specification 3.6.4.1.2 and briefly described here. To
initiate a special cycle from software, the host must write a
value to CONFIG_ADDRESS encoded as shown in Table
4-36.
4.6.3 PCI Arbiter
•
Fixed, rotating, hybrid, or ping-pong arbitration
(programmable)
•
•
•
•
•
Support four masters, three on PCI
Internal REQ for CPU
Master retry mask counter
Master dead timer
Resource or total system lock support
The next value written to CONFIG_DATA is the encoded
special cycle. Type 0 or Type 1 conversion will be based
on the Bus Bridge number matching the GXm processor’s
bus number of 00h.
Table 4-36. Special-Cycle Code to CONFIG_ADDRESS
31
30
24
23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
1
0 0 0 0 0 0 0
RSVD
Bus No. = Bridge
BUS NUMBER
1
1
1
1
1
1
1
1
0
0
0
0
0
0
T
T
CONFIG
ENABLE
DEVICE NUMBER FUNCTION REGISTER NUMBER TRANS
NUMBER
LATION
TYPE
Note: See Table 4-37 on page 156, bits [1:0] for translation type.
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