Functional Description
(Continued)
The ECL outputs have no pull-down resistors and can drive
series or parallel terminated transmission lines For short
interconnections that do not require impedance matching a
270X to 510X resistor to V
EE
can be used to establish the
V
OL
level Both V
CC
pins must always be used and should
be connected together as close to the package as possible
Pin 12 must always be connected to the V
EE
side of the
supply while pin 13 is required only if the TTL output is
used Low impedance V
CC
and V
EE
distribution and RF by-
pass capacitors are recommended to prevent crosstalk
Logic Diagram 11C90
TL F 9892 – 6
Note
This diagram is provided for understanding of logic operation only It should not be used for evaluation of propagation delays as many internal functions are
achieved more efficiently than shown
Count Sequence Table 11C90
Operating Mode Table 11C90
Inputs
MS
H
L
L
L
L
CE
X
H
L
L
L
M
1
X
X
L
H
X
M
2
X
X
L
X
H
Output
Response
Set HIGH
Hold
d
11
d
10
d
10
H
e
HIGH Voltage Level
L
e
LOW Voltage Level
X
e
Don’t Care
TL F 9892 – 7
Note
A HIGH on MS forces all Qs HIGH
7
NSC [ NATIONAL SEMICONDUCTOR ]
