5026 series
PAD LAYOUT
(Unit:
µ
m)
(750,850)
HA5026
Q
Y
VDD
VSS
INHN
NPC
XTN
(0,0)
X
Chip size: 0.75
×
0.85mm
Chip thickness: 180 ± 20µm
PAD size: 90µm
Chip base: V
DD
level
XT
PIN DESCRIPTION and PAD DIMENSIONS
Pad dimensions [µm]
Name
I/O
Description
X
INHN
XT
XTN
VDD
Q
VSS
I
I
O
–
O
–
Output state control input. High impedance when LOW (oscillator stops).
Power-saving pull-up resistor built-in.
Amplifier input
Amplifier output
Supply voltage
Output. Output frequency determined by internal circuit to one of f
O
, f
O
/2, f
O
/4, f
O
/8, f
O
/16,
f
O
/32. High impedance in standby mode
Ground
Crystal connection pins.
Crystal is connected between XT and XTN.
605
579
171
131
131
618
Y
413
144
144
438
705
718
SEIKO NPC CORPORATION —2