SM5021 series
PAD LAYOUT
(Unit:
µ
m)
PINOUT
(Top view)
Q
XTN (1000,800)
HA5021
INHN
1
2
3
6
5
4
XTN
VDD
Q
VDD
XT
(0,0) VSS
XT INHN
VSS
Chip size
: 1.00
×
0.80mm
Chip thickness : 220 ± 30µm
Chip base
: V
DD
level
PIN DESCRIPTION and PAD DIMENSIONS
Number
1
2
3
4
5
6
Name
INHN
XT
VSS
Q
VDD
XTN
I/O
I
I
–
O
–
O
Description
Output state control input. High impedance when LOW. Pull-up resistor built in
Amplifier input.
Ground
Output. Output frequency (f
O
)
Supply voltage
Amplifier output.
Crystal oscillator connection pins.
Crystal oscillator is connected between XT and XTN
Crystal oscillator connection pins.
Crystal oscillator is connected between XT and XTN
Pad dimensions [µm]
X
771
553
150
150
796
836
Y
150
150
140
649
409
636
BLOCK DIAGRAM
VDD VSS
XTN
X'tal
R
fo
C
G
R
f
C
D
Q
XT
INHN
SEIKO NPC CORPORATION —3
NPC [ NIPPON PRECISION CIRCUITS INC ]
