CF5011 series
PAD LAYOUT
(Unit:
µ
m)
VDD
Q
(920,1310)
Y
(0,0) INHN XTN
XT
VSS
X
Chip size: 0.92
×
1.31 mm
Chip thickness: 300 ± 30 µm
Chip base: V
DD
level
PIN DESCRIPTION and PAD DIMENSIONS
Pad dimensions [µm]
Name
I/O
Description
X
Operation mode control input.
<CF5011AL
×
>
The oscillator stops and Q becomes high impedance when LOW. Power saving
pull-up resistor built in
<CF5011AN
×
>
Q becomes high impedance when LOW. Pull-up resistor built in
Amplifier input
Amplifier output
Ground
Output. Output frequency (f
O
). High impedance when INHN is LOW
Supply voltage
Crystal oscillator connection pins.
Crystal oscillator connected between XT and XTN
Y
INHN
I
XT
XTN
VSS
Q
VDD
I
O
–
O
–
BLOCK DIAGRAM
CF5011AL
×
VDD VSS
XTN
C
G
R
f 1
C
f
C
D
XT
R
f 2
Q
XT
Q
INHN
Substrate potential: V
DD
HA5011A
195
212
385
575
766
765
162
212
212
212
1152
1152
CF5011AN
×
VDD VSS
XTN
C
G
R
f 2
R
f 1
C
f
C
D
INHN
Substrate potential: V
DD
NIPPON PRECISION CIRCUITS INC.—2
NPC [ NIPPON PRECISION CIRCUITS INC ]
