SM5010 series
Switching Characteristics
5010AN×, BN×, DN× series
3V operation/Duty level: CMOS
V
= 2.7 to 3.6V, V = 0V, Ta = −10 to +70°C unless otherwise noted.
SS
DD
Rating
typ
Parameter
Symbol
Condition
Unit
min
–
max
6.0
Output rise time
Output fall time
t
Measurement cct 6, load cct 1, C = 15pF, 0.1V to 0.9V
DD
3.0
ns
ns
r1
L
DD
DD
t
Measurement cct 6, load cct 1, C = 15pF, 0.9V to 0.1V
DD
–
3.0
6.0
f1
L
Measurement cct 6, load cct 1, V = 3.0V, Ta = 25°C,
L
1
DD
Output duty cycle
Duty
40
–
60
%
C = 15pF, f = 30MHz
Output disable delay time
Output enable delay time
t
–
–
–
–
100
100
ns
ns
PLZ
Measurement cct 7, load cct 1, V = 3.0V, Ta = 25°C,
L
DD
C = 15pF
t
PZL
1. The duty cycle characteristic is checked the sample chips of each production lot.
5010AN×, AK×, BN×, BK×, DN× series
5V operation/Duty level: CMOS (5010AN×, BN×, DN1)
V
= 4.5 to 5.5V, V = 0V, Ta = −40 to +85°C unless otherwise noted.
SS
DD
Rating
typ
Parameter
Symbol
Condition
Unit
min
–
max
4.0
8.0
4.0
8.0
t
t
C = 15pF
L
2.0
r1
Measurement cct 6, load cct 1,
0.1V to 0.9V
Output rise time
ns
DD
DD
C = 50pF
L
–
4.0
r2
t
t
C = 15pF
L
–
2.0
f1
Measurement cct 6, load cct 1,
0.9V to 0.1V
Output fall time
ns
%
DD
DD
C = 50pF
L
–
4.0
f2
Measurement cct 6, load cct 1, V = 5.0V, Ta = 25°C,
1
DD
Output duty cycle
Duty
45
–
55
C = 50pF, f = 30MHz
L
Output disable delay time
Output enable delay time
t
–
–
–
–
100
100
ns
ns
PLZ
Measurement cct 7, load cct 1, V = 5.0V, Ta = 25°C,
L
DD
C = 15pF
t
PZL
1. The duty cycle characteristic is checked the sample chips of each production lot.
5V operation/Duty level:TTL (5010×K1, AN2, AN3, AN4, BN2, BN3, BN4, BN5)
V
= 4.5 to 5.5V, V = 0V, Ta = −40 to +85°C unless otherwise noted.
SS
DD
Rating
typ
Parameter
Symbol
Condition
Unit
min
–
max
3.0
Output rise time
Output fall time
t
Measurement cct 6, load cct 2, C = 15pF, 0.4V to 2.4V
L
1.5
ns
ns
r3
t
Measurement cct 6, load cct 2, C = 15pF, 2.4V to 0.4V
L
–
1.5
3.0
f3
Measurement cct 6, load cct 2, V = 5.0V, Ta = 25°C,
L
1
DD
Output duty cycle
Duty
45
–
55
%
C = 15pF, f = 30MHz
Output disable delay time
Output enable delay time
t
–
–
–
–
100
100
ns
ns
PLZ
Measurement cct 7, load cct 2, V = 5.0V, Ta = 25°C,
L
DD
C = 15pF
t
PZL
1. The duty cycle characteristic is checked the sample chips of each production lot.
SEIKO NPC CORPORATION —15