SM5010 series
PAD LAYOUT
(Unit:
µ
m)
VDD
Q
(920,1180)
PINOUT
(Top view)
Y
HA5010
INHN
XT
XTN
1
2
3
4
8
7
6
5
VDD
NC
NC
Q
(0,0) INHN XT XTN VSS
X
Chip size: 0.92
×
1.18mm
Chip thickness: 300 ± 30µm
Chip base: V
DD
level
VSS
PIN DESCRIPTION and PAD DIMENSIONS
Pad dimensions [µm]
Number
Name
I/O
Description
X
1
2
3
4
5
6
7
8
INHN
XT
XTN
VSS
Q
NC
NC
VDD
I
I
O
–
O
–
–
–
Output state control input. Standby mode when LOW, pull-up resistor built in. In
the case of the 5010CL
×
, the oscillator stops and Power-saving pull-up resistor is
built-in to reduce current consumption at standby mode.
Amplifier input.
Amplifier output.
Ground
Output. Output frequency (f
O
, f
O
/2, f
O
/4, f
O
/8, f
O
/16) determined by internal
connection
No connection
No connection
Supply voltage
Crystal oscillator connection pins.
Crystal oscillator connected between XT and XTN
195
385
575
765
757.6
–
–
165.4
Y
174.4
174.4
174.4
174.4
1017.6
–
–
1014.6
SEIKO NPC CORPORATION —3