NJG1686MHH
I APPLICATION CIRCUIT
(TOP VIEW)
C1
VCTL1
VCTL2
VCTL3
VCTL4
VDD
26
25
24
23
22
1. GND
2. TRX4
3. TRX5
4. TRX6
5. GND
6. GND
7. ANT
8. GND
9. GND
10. TX2
11. GND
12. GND
13. TX1
14. GND
15. RX2
GND
GND
TRX3
TRX2
TRX1
RX1
1
21
20
19
18
17
16
15
14
DECODER, CHARGE PUMP
TRX4
2
TRX5
3
TRX6
4
GND
5
16. GND
17. RX1
GND
GND
RX2
6
18. TRX1
19. TRX2
20. TRX3
21. GND
22. VDD
23. VCTL4
24. VCTL3
25. VCTL2
26. VCTL1
C2
ANT
7
L1
LPF
LPF
GND
GND
8
9
10
11
12
13
GND
TX2
GND
GND
TX1
No DC blocking capacitors are required on all RF ports, unless DC is
biased externally.
I PARTS LIST
No.
C1
C2 *1
Parameters
1000 pF
47pF
Note
MURATA (GRM15)
MURATA (GRM15)
L1 *1
56 nH
TDK (MLG1005S)
*1: The use of the inductor L1 and the capacitor C2 are needed in order to keep zero DC Voltage at RF ports,
enhancing ESD protection level, and for good RF characteristics.
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