NJG1667MD7
!
TERMINAL INFORMATION
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SYMBOL
GND
VDD
P5
GND
P4
P3
P2
GND
P1
PC
GND
CTL3
CTL2
CTL1
DESCRIPTION
Ground terminal. Connect to the PCB ground plane.
Power supply input. This terminal should be connected to GND via a bypass
capacitor.
RF input / output port. External capacitor is required to block the DC bias
voltage of internal circuit.
Ground terminal. Connect to the PCB ground plane.
RF input / output port. External capacitor is required to block the DC bias
voltage of internal circuit.
RF input / output port. External capacitor is required to block the DC bias
voltage of internal circuit.
RF input / output port. External capacitor is required to block the DC bias
voltage of internal circuit.
Ground terminal. Connect to the PCB ground plane.
RF input / output port. External capacitor is required to block the DC bias
voltage of internal circuit.
Common RF input / output port. External capacitor is required to block the
DC bias voltage of internal circuit.
Ground terminal. Connect to the PCB ground plane.
Control port. “High level” is DC +1.3V~4.5V, “Low level” is DC 0~+0.4V.
Control port. “High level” is DC +1.3V~4.5V, “Low level” is DC 0~+0.4V.
Control port. “High level” is DC +1.3V~4.5V, “Low level” is DC 0~+0.4V.
-3-
NJRC [ NEW JAPAN RADIO ]
