NJG1523KB2
nAPPLICATION CIRCUIT
VCTL1 (2.7V/0V)
Zo=50W
P1
1
2
3
6
5
4
C1
C5
Zo=50W
PC
C3
Zo=50W
C2
P2
VCTL2 (0V/2.7V)
C4
NJG1523KB2
Parts List
Parts number
List 1
List 2
List 3
Notes
50~100MHz 0.1~0.5GHz 0.5~2.5GHz
C1~C3
C4, C5
0.01uF
10pF
1000pF
10pF
56pF
10pF
GRM36 MURATA
GRM36 MURATA
nRECOMMENDED PCB DESIGN
(TOP VIEW)
C2
C4
VCTL2
C1
P1
P2
C5
PCB SIZE=19.4x14.0mm
PCB: FR-4, t=0.2mm
VCTL1
CAPACITOR: size 1005
STRIPLINE WIDTH=0.4mm
C3
PC
PRECAUTIONS
[1] The DC blocking capacitors have to be placed at RF terminal of P1, P2 and PC.
Please choose appropriate capacitance values to the application frequency.
[2]To reduce stlipline influence on RF characteristics, please locate bypass
capacitors (C4, C5) close to each terminals.
[3]For good isolation, the GND terminal (2nd pin) must be placed possibly close to
ground plane of substrate, and through holes for GND should be placed near by
the pin connection.
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