NJG1522KB2
nTERMINAL INFORMATION
No.
1
SYMBOL
P1
DESCRIPTIONS
RF port. This port is connected with PC port by controlling 6th pin (VCTL (H)
)
to 2.5~6.5V and 4th pin(VCTL(L)) to -0.2~+0.2V. An external capacitor is
required to block the DC bias voltage of internal circuit. (50~100MHz:
0.01uF, 0.1~0.5GHz: 1000pF, 0.5~2.5GHz: 56pF)
Ground terminal. Please connect this terminal with ground plane as close
as possible for excellent RF performance.
2
3
GND
P2
RF port. This port is connected with PC port by controlling 4th pin(VCTL(H)
)
to 2.5 – 6.5V and 6th pin(VCTL(L)) to -0.2~+0.2V. An external capacitor is
required to block the DC bias voltage of internal circuit. (50~100MHz:
0.01uF, 0.1~0.5GHz: 1000pF, 0.5~2.5GHz: 56pF)
Control port 2. The voltage of this port controls PC to P2 state. The ‘ON’
and ‘OFF’ state is toggled by controlling voltage of this terminal such as
high-state (2.5~6.5V) or low-state (-0.2~+0.2V). The voltage of 6th pin
have to be set to opposite state. The bypass capacitor has to be chosen
to reduce switching time delay from 10pF~1000pF range.
Common RF port. In order to block the DC bias voltage of internal circuit,
an external capacitor is required. (50~100MHz: 0.01uF, 0.1~0.5GHz:
1000pF, 0.5~2.5GHz: 56pF)
Control port 1. The voltage of this port controls PC to P2 state. The ‘ON’
and ‘OFF’ state is toggled by controlling voltage of this terminal such as
high-state (2.5~6.5V) or low-state (-0.2~+0.2V). The voltage of 4th pin
have to be set to opposite state. The bypass capacitor has to be chosen
to reduce switching time delay from 10pF~1000pF range.
4
5
6
VCTL2
PC
VCTL1
- 3 -
NJRC [ NEW JAPAN RADIO ]
