NJG1516R
TERMINAL INFORMATION
No.
SYMBOL
EXPLANATION
Control port 2. The voltage of this port controls PC to P2 state. The ‘ON’
and ‘OFF’ state is toggled by controlling voltage of this terminal such as
high-state (2.7~5.5V) or low-state (-0.2~+0.2V). The voltage of 4
th
pin have
to be set to opposite state. The bypass capacitor has to be chosen to
reduce switching speed delay from 10pF~1000pF range.
Common RF port. In order to block the DC bias voltage of internal circuit,
an external capacitor is required. (50~100MHz: 0.01uF, 0.1~0.5GHz:
1000pF, 0.5~2.5GHz: 56pF)
Ground terminal. Please connect this terminal with ground plane as close
as possible for excellent RF performance.
Control port 1. The voltage of this port controls PC to P2 state. The ‘ON’
and ‘OFF’ state is toggled by controlling voltage of this terminal such as
high-state (2.7~5.5V) or low-state (-0.2~+0.2V). The voltage of 1
st
pin have
to be set to opposite state. The bypass capacitor has to be chosen to
reduce switching speed delay from 10pF~1000pF range.
RF port. This port is connected with PC port by controlling 4
th
pin (V
CTL (H)
)
to 2.7~9.0V and 1
st
pin (V
CTL (L)
) to -0.2~+0.2V. An external capacitor is
required to block the DC bias voltage of internal circuit. (50~100MHz:
0.01µF, 0.1~0.5GHz: 1000pF, 0.5~2.5GHz: 56pF)
RF port. This port is connected with PC port by controlling 1
st
pin (V
CTL (H)
)
to 2.7~9.0V and 4
th
pin (V
CTL (L)
) to -0.2~+0.2V. An external capacitor is
required to block the DC bias voltage of internal circuit. (50~100MHz:
0.01µF, 0.1~0.5GHz: 1000pF, 0.5~2.5GHz: 56pF)
1
VCTL2
2
3, 6, 7
PC
GND
4
VCTL1
5
P1
8
P2
- 4-
NJRC [ NEW JAPAN RADIO ]
