NJW4800
ꢀFUNCTIONAL EXPLANATION
ꢁHigh-side, Low-side Switch
The SW output drives the load. It is controlled by the logic input signal from PWM terminal at PWM. When the signal at
PWM is high (above 2.2V), the high-side switch is turned on. When the signal at PWM is low (less than 0.9V), the
low-side switch is turned on.
The NJW4800 uses built-in Nch MOSFETs (RON=0.25Ω typ.) for both the high-side and low-side switches. The
high-side SW gate is driven with V++5V that generated by bootstrap. The high-side SW turn on time is limited to
300µsec(typ.). (ex. Fig2)
ON
There is a dead time region (20nsec (typ.): design value) to
High Side
prevent short circuit (high-side and low-side) where both the
high-side and low-side switches are off. (ex. Fig3)
The NJW4800 is suitable for high-frequency switching
regulator. The NJW4800 operates at frequencies up to
1.2MHz.
SW
OFF
ON
Low Side
SW
OFF
The OUT terminal is pulled down inside with 100kΩ,
compensates the leak current of the High-side SW.
Dead Time 20ns typ.
Fig3. SW Function and Dead Time Relation
ꢁOver Current Protection Function
The internal over-current protection circuit monitors the flow currents of both the high-side and low-side switches. The
over-current protection circuit operates at 5.5A (typ.) and stops the SW operation. The FLT signal is output from FLT
terminal at the same time. The over-current protection operation is released at the PWM input signal falling edge. (ex.
Fig4)
If OUT terminal is shorted directly to GND, a large surge current is flowing for fast current change and may exceed
current limit. Because that time big electric power consumption occurs instantaneously in NJW4800, you should design
sufficient heat dissipation.
When a load condition is inductive property, a reverse direction current flows to the high-side and low-side SW body
diode by inductive kickback.
The built-in over-current protection circuit has not aimed at protection against the inductive kickback.
Therefore, an external diode should be considered usage against reverse-current regeneration according to the kind of
the application.
The Overcurrent Protection is
released with the falling edge
High
PWM Input
Low
ON
High Side SW
Low Side SW
Hi-Z
Hi-Z
Hi-Z
Hi-Z
OFF
ON
OFF
ON
Current Limit
OFF
High
Fault Output
(FLT pin Pull-Up)
Low
Fig4. Timing Chart of High-side/Low-side Switch at Over Current Protection Operating
Ver.2010-09-29
- 12 -
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