10.3.
Serial Interface (4‐wire)
The 4‐wire serial interface consists of serial clock SCLK, serial data SDIN, D/C, and /CS.
D0 acts as SCLK and D1 acts as SDIN. D2 should be left open. D3~D7, E, and R/W should be connected to GND.
Function
Write Command
Write Data
/RD
/WR
/CS
0
0
D/C
0
1
D0
↑
↑
Tie LOW Tie LOW
Tie LOW Tie LOW
SDIN is shifted into an 8‐bit shift register on every rising edge of SCLK in the order of D7, D6,…D0.
D/C is sampled on every eighth clock and the data byte in the shift register is written to the GDRAM or
command register in the same clock.
Note: Read is not available in serial mode.
10.4.
Serial Interface (3‐wire)
The 3‐wire serial interface consists of serial clock SCLK, serial data SDIN, and /CS.
D0 acts as SCLK and D1 acts as SDIN. D2 should be left open. D3~D7, E, R/W, and D/C should be connected to
GND.
Function
Write Command
Write Data
/RD
/WR
/CS
0
0
D/C
Tie LOW
Tie LOW
D0
↑
↑
Tie LOW Tie LOW
Tie LOW Tie LOW
SDIN is shifted into an 9‐bit shift register on every rising edge of SCLK in the order of D/C, D7, D6,…D0.
D/C (first bit of the sequential data) will determine if the following data byte is written to the Display Data
RAM (D/C = 1) or the command register (D/C = 0).
Note: Read is not available in serial mode.
For detailed protocol information, see datasheet: http://www.newhavendisplay.com/app_notes/SSD1322.pdf
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NEWHAVEN [ NEWHAVEN DISPLAY INTERNATIONAL, INC. ]
